From: Ethan Chen via <qemu-devel@nongnu.org>
To: Alistair Francis <alistair23@gmail.com>
Cc: <qemu-devel@nongnu.org>, <peter.maydell@linaro.org>,
<edgar.iglesias@gmail.com>, <richard.henderson@linaro.org>,
<pbonzini@redhat.com>, <palmer@dabbelt.com>,
<alistair.francis@wdc.com>, <in.meng@windriver.com>,
<liweiwei@iscas.ac.cn>, <dbarboza@ventanamicro.com>,
<hiwei_liu@linux.alibaba.com>, <qemu-riscv@nongnu.org>,
<peterx@redhat.com>, <david@redhat.com>
Subject: Re: [PATCH v4 0/4] Support RISC-V IOPMP
Date: Tue, 23 Jan 2024 11:31:46 +0800 [thread overview]
Message-ID: <Za8zFn6Vw1JF1IpX@ethan84-VirtualBox> (raw)
In-Reply-To: <CAKmqyKN2NAmmWiH1eUy8Hf+V0-5ENTjews5o0VzPDfySt_nqgw@mail.gmail.com>
On Mon, Jan 22, 2024 at 04:01:12PM +1000, Alistair Francis wrote:
> On Thu, Dec 21, 2023 at 4:38 PM Ethan Chen <ethan84@andestech.com> wrote:
> >
> > On Mon, Dec 18, 2023 at 02:18:58PM +1000, Alistair Francis wrote:
> > > On Wed, Nov 22, 2023 at 3:36 PM Ethan Chen via <qemu-devel@nongnu.org> wrote:
> > > >
> > > > This series implements IOPMP specification v1.0.0-draft4 rapid-k model.
> > > > The specification url:
> > > > https://github.com/riscv-non-isa/iopmp-spec/blob/main/riscv_iopmp_specification.pdf
> > > >
> > > > When IOPMP is enabled, a DMA device ATCDMAC300 is added to RISC-V virt
> > > > platform. This DMA device is connected to the IOPMP and has the functionalities
> > >
> > > I don't think we want to add an Andes DMA device to the virt machine.
> > >
> > > I can't even find the spec for the ATCDMAC300, which isn't great
> > >
> > > Alistair
> >
> > Since the IOPMP does not take effect when there is no other device connects to
> > IOPMP, I think it is necessary to have a DMA device for IOPMP demonstration.
>
> That is true, but that device shouldn't be a vendor specific device
> for the virt machine.
>
> >
> > Do you have any suggestions for supporting IOPMP on RISC-V virt machine?
>
> A RVI device would be fine. Otherwise something that has become a
> defacto standard by being commonly used (the SiFive PLIC for example).
>
> I really don't think it should be some vendor IP, especially one that
> doesn't have a public datasheet.
>
> You could add an Andes machine that can use your vendor IP. Otherwise
> we can look at adding IOPMP and not connecting it, but that is a pain.
In submitted patch v5, I removed vendor IP and made generic PCIe host
bridge on RISC-V virt machine connect to IOPMP. DMA operation from PCI
devices on the bridge will be check by IOPMP.
>
> What is the IOPMP spec group doing for testing?
IOPMP TG is doing an implementation(RTL) testing.
NVidia will provide SystemC stimulus from different ports to test or
observe the object under testing. A test bench will be provided in
the form of TLM-2.0 transaction level modeling.
Thanks,
Ethan Chen
next prev parent reply other threads:[~2024-01-23 3:32 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-22 5:32 [PATCH v4 0/4] Support RISC-V IOPMP Ethan Chen via
2023-11-22 5:32 ` [PATCH v4 1/4] hw/core: Add config stream Ethan Chen via
2023-12-18 4:02 ` Alistair Francis
2023-11-22 5:32 ` [PATCH v4 2/4] Add RISC-V IOPMP support Ethan Chen via
2023-12-18 4:04 ` Alistair Francis
2023-12-27 2:26 ` Ethan Chen via
2023-11-22 5:32 ` [PATCH v4 3/4] hw/dma: Add Andes ATCDMAC300 support Ethan Chen via
2023-12-18 4:14 ` Alistair Francis
2023-11-22 5:32 ` [PATCH v4 4/4] hw/riscv/virt: Add IOPMP support Ethan Chen via
2023-12-18 4:16 ` Alistair Francis
2023-12-05 7:47 ` [PATCH v4 0/4] Support RISC-V IOPMP Ethan Chen via
2023-12-13 5:35 ` Ethan Chen via
2023-12-18 4:18 ` Alistair Francis
2023-12-21 6:38 ` Ethan Chen via
2024-01-22 6:01 ` Alistair Francis
2024-01-23 3:31 ` Ethan Chen via [this message]
2024-01-04 2:38 ` Ethan Chen via
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