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From: Zhao Liu <zhao1.liu@linux.intel.com>
To: Yuan Yao <yuan.yao@linux.intel.com>
Cc: Xiaoyao Li <xiaoyao.li@intel.com>,
	Eduardo Habkost <eduardo@habkost.net>,
	Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Marcelo Tosatti <mtosatti@redhat.com>,
	qemu-devel@nongnu.org, kvm@vger.kernel.org,
	Zhenyu Wang <zhenyu.z.wang@intel.com>,
	Zhuocheng Ding <zhuocheng.ding@intel.com>,
	Zhao Liu <zhao1.liu@intel.com>, Babu Moger <babu.moger@amd.com>,
	Yongwei Ma <yongwei.ma@intel.com>
Subject: Re: [PATCH v7 08/16] i386: Expose module level in CPUID[0x1F]
Date: Mon, 15 Jan 2024 15:20:37 +0800	[thread overview]
Message-ID: <ZaTcxVGHhQtLC/Ki@intel.com> (raw)
In-Reply-To: <20240115065730.ezwpd3sjoycc57rm@yy-desk-7060>

On Mon, Jan 15, 2024 at 02:57:30PM +0800, Yuan Yao wrote:
> Date: Mon, 15 Jan 2024 14:57:30 +0800
> From: Yuan Yao <yuan.yao@linux.intel.com>
> Subject: Re: [PATCH v7 08/16] i386: Expose module level in CPUID[0x1F]
> 
> On Mon, Jan 15, 2024 at 02:20:20PM +0800, Zhao Liu wrote:
> > On Mon, Jan 15, 2024 at 01:20:22PM +0800, Yuan Yao wrote:
> > > Date: Mon, 15 Jan 2024 13:20:22 +0800
> > > From: Yuan Yao <yuan.yao@linux.intel.com>
> > > Subject: Re: [PATCH v7 08/16] i386: Expose module level in CPUID[0x1F]
> > >
> > > Ah, so my understanding is incorrect on this.
> > >
> > > I tried on one raptor lake i5-i335U, which also hybrid soc but doesn't have
> > > module level, in this case 0x1f and 0xb have same values in core/lp level.
> >
> > Some socs have modules/dies but they don't expose them in 0x1f.
> 
> Here they don't expose because from hardware level they can't or possible
> software level configuration (i.e. disable some cores in bios) ?
>

This leaf is decided at hardware level. Whether or not which levels are exposed
sometimes depends if there is the topology-related feature, but there is no clear
rule (just as in the ADL family neither ADL-S/P exposes modules, while ADL-N
exposes modules).

Regards,
Zhao



  reply	other threads:[~2024-01-15  7:08 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-08  8:27 [PATCH v7 00/16] Support smp.clusters for x86 in QEMU Zhao Liu
2024-01-08  8:27 ` [PATCH v7 01/16] i386/cpu: Fix i/d-cache topology to core level for Intel CPU Zhao Liu
2024-01-08  8:27 ` [PATCH v7 02/16] i386/cpu: Use APIC ID offset to encode cache topo in CPUID[4] Zhao Liu
2024-01-10  9:31   ` Xiaoyao Li
2024-01-11  8:43     ` Zhao Liu
2024-01-14 14:11       ` Xiaoyao Li
2024-01-15  3:04         ` Zhao Liu
2024-01-15  3:51       ` Xiaoyao Li
2024-01-15  4:16         ` Zhao Liu
2024-01-08  8:27 ` [PATCH v7 03/16] i386/cpu: Consolidate the use of topo_info in cpu_x86_cpuid() Zhao Liu
2024-01-10 11:52   ` Xiaoyao Li
2024-01-11  8:46     ` Zhao Liu
2024-01-08  8:27 ` [PATCH v7 04/16] i386: Split topology types of CPUID[0x1F] from the definitions of CPUID[0xB] Zhao Liu
2024-01-08  8:27 ` [PATCH v7 05/16] i386: Decouple CPUID[0x1F] subleaf with specific topology level Zhao Liu
2024-01-11  3:19   ` Xiaoyao Li
2024-01-11  9:07     ` Zhao Liu
2024-01-23  9:56     ` Zhao Liu
2024-01-08  8:27 ` [PATCH v7 06/16] i386: Introduce module-level cpu topology to CPUX86State Zhao Liu
2024-01-08  8:27 ` [PATCH v7 07/16] i386: Support modules_per_die in X86CPUTopoInfo Zhao Liu
2024-01-11  5:53   ` Xiaoyao Li
2024-01-11  9:18     ` Zhao Liu
2024-01-08  8:27 ` [PATCH v7 08/16] i386: Expose module level in CPUID[0x1F] Zhao Liu
2024-01-11  6:04   ` Xiaoyao Li
2024-01-11  9:21     ` Zhao Liu
2024-01-15  3:25   ` Yuan Yao
2024-01-15  4:09     ` Zhao Liu
2024-01-15  4:34       ` Xiaoyao Li
2024-01-15  5:20         ` Yuan Yao
2024-01-15  6:20           ` Zhao Liu
2024-01-15  6:57             ` Yuan Yao
2024-01-15  7:20               ` Zhao Liu [this message]
2024-01-15  9:03                 ` Yuan Yao
2024-01-15  6:12         ` Zhao Liu
2024-01-15  6:11           ` Xiaoyao Li
2024-01-15  6:35             ` Zhao Liu
2024-01-15  7:16               ` Xiaoyao Li
2024-01-15 15:46                 ` Zhao Liu
2024-01-08  8:27 ` [PATCH v7 09/16] i386: Support module_id in X86CPUTopoIDs Zhao Liu
2024-01-14 12:42   ` Xiaoyao Li
2024-01-15  3:52     ` Zhao Liu
2024-01-08  8:27 ` [PATCH v7 10/16] i386/cpu: Introduce cluster-id to X86CPU Zhao Liu
2024-01-14 13:49   ` Xiaoyao Li
2024-01-15  3:27     ` Zhao Liu
2024-01-15  4:18       ` Xiaoyao Li
2024-01-15  5:59         ` Zhao Liu
2024-01-15  7:45           ` Xiaoyao Li
2024-01-15 15:18             ` Zhao Liu
2024-01-16 16:40               ` Xiaoyao Li
2024-01-19  7:59                 ` Zhao Liu
2024-01-26  3:37                   ` Zhao Liu
2024-01-08  8:27 ` [PATCH v7 11/16] tests: Add test case of APIC ID for module level parsing Zhao Liu
2024-01-08  8:27 ` [PATCH v7 12/16] hw/i386/pc: Support smp.clusters for x86 PC machine Zhao Liu
2024-01-08  8:27 ` [PATCH v7 13/16] i386: Add cache topology info in CPUCacheInfo Zhao Liu
2024-01-08  8:27 ` [PATCH v7 14/16] i386: Use CPUCacheInfo.share_level to encode CPUID[4] Zhao Liu
2024-01-14 14:31   ` Xiaoyao Li
2024-01-15  3:40     ` Zhao Liu
2024-01-15  4:25       ` Xiaoyao Li
2024-01-15  6:25         ` Zhao Liu
2024-01-15  7:00           ` Xiaoyao Li
2024-01-15 14:55             ` Zhao Liu
2024-01-08  8:27 ` [PATCH v7 15/16] i386: Use offsets get NumSharingCache for CPUID[0x8000001D].EAX[bits 25:14] Zhao Liu
2024-01-14 14:42   ` Xiaoyao Li
2024-01-15  3:48     ` Zhao Liu
2024-01-15  4:27       ` Xiaoyao Li
2024-01-15 14:54         ` Zhao Liu
2024-01-08  8:27 ` [PATCH v7 16/16] i386: Use CPUCacheInfo.share_level to encode " Zhao Liu
2024-01-08 17:46 ` [PATCH v7 00/16] Support smp.clusters for x86 in QEMU Moger, Babu
2024-01-09  1:48   ` Zhao Liu

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