From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 22E9FC4829E for ; Thu, 15 Feb 2024 18:47:51 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1raglY-0000u2-Ck; Thu, 15 Feb 2024 13:47:24 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1raglX-0000oa-1U for qemu-devel@nongnu.org; Thu, 15 Feb 2024 13:47:23 -0500 Received: from mail-pg1-x534.google.com ([2607:f8b0:4864:20::534]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1raglV-0004jE-0r for qemu-devel@nongnu.org; Thu, 15 Feb 2024 13:47:22 -0500 Received: by mail-pg1-x534.google.com with SMTP id 41be03b00d2f7-5d8ddbac4fbso1004409a12.0 for ; Thu, 15 Feb 2024 10:47:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1708022839; x=1708627639; darn=nongnu.org; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:date:from:from:to:cc:subject:date:message-id:reply-to; bh=3z90p2xOKMarDgjIWEH3zhzvAjpbfMyeAijBDDuA6uE=; b=hPa5N18xUW12jY1ZZYqn11l5WpNDEObhHCBMHCCutSZun/bF7jknfaJBesWmiSDV8i 3bR5er31uJnqNoMTjaxSZAs/ZJyqW+oz/kuR3H//n2t2ympZp3KqSw6fb3ddb1+TnWLP FSLqlY9uXtf4wj09zvfEiPndmeC+ZxfNMULtlKO33dmqQ828YogEhsMS7DOHntxt4cJe ONzgs/JyIRVz9SZ16julNhPENDoJy9lcbEtSK9WiXqoGoddKvGdVGOLsL1L/dWFveWhp 2jfYptKxbMzpEfeq3L9zN3y4+JKDNaz2jVA9HuU6PlIIToJQ1gaPnBvNlLP9P4Zwzcs3 uPRA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708022839; x=1708627639; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:date:from:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=3z90p2xOKMarDgjIWEH3zhzvAjpbfMyeAijBDDuA6uE=; b=UNjh/W9RTaO2oO7qFR5JOVs5aJ3aKm3+mdK2KOP1Wx+rd0c9XTWZREKDQ+dRfeUb9c VMU/M6TqOMmlePoAOh6yJyALADySQIpu7jzsJ4aEH07Zz/T8SMRlNevM5wzs4fXuX7++ x4shu83mGDKpyt0QD4QieWAlFujTuiytjyG7PfEiC2zCK1zRL2FRPQ3KGWhuvmd3jqfr t1uFXD0YZRWeOycIWQbjzVwCzvtsyptO6hP9CEOl7tp0eZADILUtzVcRF9q1OgPGnPZg TsFqG4yTlrCeGus8XtW3FT3t/XYkNMhoHP1mXYYNs4sm4z4G40OaFUAhp4CIAPII61AG gY0Q== X-Gm-Message-State: AOJu0Yx2RwadCTcqdKN81dOSFsyxWRciDYc+itHJO8hAHJ7DGQUMM9G/ d/GyYRnwIZwZRFQOZZUv4+6+8b7bv5FP+bxMbn4YY+hay/yLovWr X-Google-Smtp-Source: AGHT+IFYHxcxC5K///xN8TdhvcV0L0S4HqGrm6Owjo8OMKvGaqisRg+RzbGDo9m7iGenBVoNKQmouQ== X-Received: by 2002:a05:6a20:d493:b0:19e:3ccd:6f86 with SMTP id im19-20020a056a20d49300b0019e3ccd6f86mr3412887pzb.43.1708022839161; Thu, 15 Feb 2024 10:47:19 -0800 (PST) Received: from debian ([2601:641:300:14de:5279:cdf6:aaf1:e09c]) by smtp.gmail.com with ESMTPSA id d128-20020a633686000000b005dc884e9f5bsm1726394pga.38.2024.02.15.10.47.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Feb 2024 10:47:18 -0800 (PST) From: fan X-Google-Original-From: fan Date: Thu, 15 Feb 2024 10:47:16 -0800 To: shiju.jose@huawei.com Cc: qemu-devel@nongnu.org, linux-cxl@vger.kernel.org, jonathan.cameron@huawei.com, tanxiaofei@huawei.com, prime.zeng@hisilicon.com, linuxarm@huawei.com, fan.ni@samsung.com Subject: Re: [PATCH v2 2/3] hw/cxl/cxl-mailbox-utils: Add device patrol scrub control feature Message-ID: References: <20231124135338.1191-1-shiju.jose@huawei.com> <20231124135338.1191-3-shiju.jose@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231124135338.1191-3-shiju.jose@huawei.com> Received-SPF: pass client-ip=2607:f8b0:4864:20::534; envelope-from=nifan.cxl@gmail.com; helo=mail-pg1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Fri, Nov 24, 2023 at 09:53:36PM +0800, shiju.jose@huawei.com wrote: > From: Shiju Jose > > CXL spec 3.1 section 8.2.9.9.11.1 describes the device patrol scrub control > feature. The device patrol scrub proactively locates and makes corrections > to errors in regular cycle. The patrol scrub control allows the request to > configure patrol scrub input configurations. > > The patrol scrub control allows the requester to specify the number of > hours for which the patrol scrub cycles must be completed, provided that > the requested number is not less than the minimum number of hours for the > patrol scrub cycle that the device is capable of. In addition, the patrol > scrub controls allow the host to disable and enable the feature in case > disabling of the feature is needed for other purposes such as > performance-aware operations which require the background operations to be > turned off. > > Reviewed-by: Davidlohr Bueso > Signed-off-by: Shiju Jose > --- LGTM except for some minor comments inlined. > hw/cxl/cxl-mailbox-utils.c | 97 +++++++++++++++++++++++++++++++++++++- > 1 file changed, 96 insertions(+), 1 deletion(-) > > diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c > index 1bbc9a48a6..5a6f4e4029 100644 > --- a/hw/cxl/cxl-mailbox-utils.c > +++ b/hw/cxl/cxl-mailbox-utils.c > @@ -809,6 +809,7 @@ typedef struct CXLSupportedFeatureEntry { > } QEMU_PACKED CXLSupportedFeatureEntry; > > enum CXL_SUPPORTED_FEATURES_LIST { > + CXL_FEATURE_PATROL_SCRUB = 0, > CXL_FEATURE_MAX > }; > > @@ -849,6 +850,37 @@ enum CXL_SET_FEATURE_FLAG_DATA_TRANSFER { > CXL_SET_FEATURE_FLAG_DATA_TRANSFER_MAX > }; > > +/* CXL r3.1 section 8.2.9.9.11.1: Device Patrol Scrub Control Feature */ > +static const QemuUUID patrol_scrub_uuid = { > + .data = UUID(0x96dad7d6, 0xfde8, 0x482b, 0xa7, 0x33, > + 0x75, 0x77, 0x4e, 0x06, 0xdb, 0x8a) > +}; > + > +#define CXL_MEMDEV_PS_GET_FEATURE_VERSION 0x01 > +#define CXL_MEMDEV_PS_SET_FEATURE_VERSION 0x01 > +#define CXL_MEMDEV_PS_SCRUB_CYCLE_CHANGE_CAP_DEFAULT BIT(0) > +#define CXL_MEMDEV_PS_SCRUB_REALTIME_REPORT_CAP_DEFAULT BIT(1) > +#define CXL_MEMDEV_PS_CUR_SCRUB_CYCLE_DEFAULT 12 > +#define CXL_MEMDEV_PS_MIN_SCRUB_CYCLE_DEFAULT 1 > +#define CXL_MEMDEV_PS_ENABLE_DEFAULT 0 > + > +/* CXL memdev patrol scrub control attributes */ > +struct CXLMemPatrolScrubReadAttrbs { > + uint8_t scrub_cycle_cap; > + uint16_t scrub_cycle; > + uint8_t scrub_flags; > +} QEMU_PACKED cxl_memdev_ps_feat_read_attrbs; > + > +typedef struct CXLMemPatrolScrubWriteAttrbs { > + uint8_t scrub_cycle_hr; > + uint8_t scrub_flags; > +} QEMU_PACKED CXLMemPatrolScrubWriteAttrbs; > + > +typedef struct CXLMemPatrolScrubSetFeature { > + CXLSetFeatureInHeader hdr; > + CXLMemPatrolScrubWriteAttrbs feat_data; > +} QEMU_PACKED QEMU_ALIGNED(16) CXLMemPatrolScrubSetFeature; > + > /* CXL r3.0 section 8.2.9.6.1: Get Supported Features (Opcode 0500h) */ > static CXLRetCode cmd_features_get_supported(const struct cxl_cmd *cmd, > uint8_t *payload_in, > @@ -872,7 +904,7 @@ static CXLRetCode cmd_features_get_supported(const struct cxl_cmd *cmd, > uint16_t feat_entries = 0; > > if (get_feats_in->count < sizeof(CXLSupportedFeatureHeader) || > - get_feats_in->start_index > CXL_FEATURE_MAX) { > + get_feats_in->start_index >= CXL_FEATURE_MAX) { Not totally sure about this, the spec says "...Greater than..." although I also think it should be >=. Similar things for the offset usage below. Fan > return CXL_MBOX_INVALID_INPUT; > } > req_entries = (get_feats_in->count - > @@ -884,6 +916,31 @@ static CXLRetCode cmd_features_get_supported(const struct cxl_cmd *cmd, > entry = 0; > while (entry < req_entries) { > switch (index) { > + case CXL_FEATURE_PATROL_SCRUB: > + /* Fill supported feature entry for device patrol scrub control */ > + get_feats_out->feat_entries[entry] = > + (struct CXLSupportedFeatureEntry) { > + .uuid = patrol_scrub_uuid, > + .feat_index = index, > + .get_feat_size = sizeof(cxl_memdev_ps_feat_read_attrbs), > + .set_feat_size = sizeof(CXLMemPatrolScrubWriteAttrbs), > + /* Bit[0] : 1, feature attributes changeable */ > + .attrb_flags = 0x1, > + .get_feat_version = CXL_MEMDEV_PS_GET_FEATURE_VERSION, > + .set_feat_version = CXL_MEMDEV_PS_SET_FEATURE_VERSION, > + .set_feat_effects = 0, > + }; > + feat_entries++; > + /* Set default value for device patrol scrub read attributes */ > + cxl_memdev_ps_feat_read_attrbs.scrub_cycle_cap = > + CXL_MEMDEV_PS_SCRUB_CYCLE_CHANGE_CAP_DEFAULT | > + CXL_MEMDEV_PS_SCRUB_REALTIME_REPORT_CAP_DEFAULT; > + cxl_memdev_ps_feat_read_attrbs.scrub_cycle = > + CXL_MEMDEV_PS_CUR_SCRUB_CYCLE_DEFAULT | > + (CXL_MEMDEV_PS_MIN_SCRUB_CYCLE_DEFAULT << 8); > + cxl_memdev_ps_feat_read_attrbs.scrub_flags = > + CXL_MEMDEV_PS_ENABLE_DEFAULT; > + break; > default: > break; > } > @@ -924,6 +981,21 @@ static CXLRetCode cmd_features_get_feature(const struct cxl_cmd *cmd, > return CXL_MBOX_INVALID_INPUT; > } > > + if (qemu_uuid_is_equal(&get_feature->uuid, &patrol_scrub_uuid)) { > + if (get_feature->offset >= sizeof(cxl_memdev_ps_feat_read_attrbs)) { > + return CXL_MBOX_INVALID_INPUT; > + } > + bytes_to_copy = sizeof(cxl_memdev_ps_feat_read_attrbs) - > + get_feature->offset; > + bytes_to_copy = (bytes_to_copy > get_feature->count) ? > + get_feature->count : bytes_to_copy; > + memcpy(payload_out, > + &cxl_memdev_ps_feat_read_attrbs + get_feature->offset, > + bytes_to_copy); > + } else { > + return CXL_MBOX_UNSUPPORTED; > + } > + > *len_out = bytes_to_copy; > > return CXL_MBOX_SUCCESS; > @@ -937,6 +1009,29 @@ static CXLRetCode cmd_features_set_feature(const struct cxl_cmd *cmd, > size_t *len_out, > CXLCCI *cci) > { > + CXLMemPatrolScrubWriteAttrbs *ps_write_attrbs; > + CXLMemPatrolScrubSetFeature *ps_set_feature; > + CXLSetFeatureInHeader *hdr = (void *)payload_in; > + > + if (qemu_uuid_is_equal(&hdr->uuid, &patrol_scrub_uuid)) { > + if (hdr->version != CXL_MEMDEV_PS_SET_FEATURE_VERSION || > + (hdr->flags & CXL_SET_FEATURE_FLAG_DATA_TRANSFER_MASK) != > + CXL_SET_FEATURE_FLAG_FULL_DATA_TRANSFER) { > + return CXL_MBOX_UNSUPPORTED; > + } > + > + ps_set_feature = (void *)payload_in; > + ps_write_attrbs = &ps_set_feature->feat_data; > + cxl_memdev_ps_feat_read_attrbs.scrub_cycle &= ~0xFF; > + cxl_memdev_ps_feat_read_attrbs.scrub_cycle |= > + ps_write_attrbs->scrub_cycle_hr & 0xFF; > + cxl_memdev_ps_feat_read_attrbs.scrub_flags &= ~0x1; > + cxl_memdev_ps_feat_read_attrbs.scrub_flags |= > + ps_write_attrbs->scrub_flags & 0x1; > + } else { > + return CXL_MBOX_UNSUPPORTED; > + } > + > return CXL_MBOX_SUCCESS; > } > > -- > 2.34.1 >