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From: "Daniel P. Berrangé" <berrange@redhat.com>
To: Zhao Liu <zhao1.liu@linux.intel.com>
Cc: "Jonathan Cameron" <Jonathan.Cameron@huawei.com>,
	"Eduardo Habkost" <eduardo@habkost.net>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Philippe Mathieu-Daud�" <philmd@linaro.org>,
	"Yanan Wang" <wangyanan55@huawei.com>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Eric Blake" <eblake@redhat.com>,
	"Markus Armbruster" <armbru@redhat.com>,
	"Marcelo Tosatti" <mtosatti@redhat.com>,
	"Alex Benn�e" <alex.bennee@linaro.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Sia Jee Heng" <jeeheng.sia@starfivetech.com>,
	qemu-devel@nongnu.org, kvm@vger.kernel.org,
	qemu-riscv@nongnu.org, qemu-arm@nongnu.org,
	"Zhenyu Wang" <zhenyu.z.wang@intel.com>,
	"Dapeng Mi" <dapeng1.mi@linux.intel.com>,
	"Yongwei Ma" <yongwei.ma@intel.com>,
	"Zhao Liu" <zhao1.liu@intel.com>
Subject: Re: [RFC 4/8] hw/core: Add cache topology options in -smp
Date: Tue, 27 Feb 2024 09:12:20 +0000	[thread overview]
Message-ID: <Zd2ndJghXbmMHzBn@redhat.com> (raw)
In-Reply-To: <Zd2pWVH4/eo3HM8j@intel.com>

On Tue, Feb 27, 2024 at 05:20:25PM +0800, Zhao Liu wrote:
> Hi Jonathan,
> 
> > Hi Zhao Liu
> > 
> > I like the scheme.  Strikes a good balance between complexity of description
> > and systems that actually exist. Sure there are systems with more cache
> > levels etc but they are rare and support can be easily added later
> > if people want to model them.
> 
> Thanks for your support!
> 
> [snip]
> 
> > > +static int smp_cache_string_to_topology(MachineState *ms,
> > 
> > Not a good name for a function that does rather more than that.
> 
> What about "smp_cache_get_valid_topology()"?
> 
> > 
> > > +                                        char *topo_str,
> > > +                                        CPUTopoLevel *topo,
> > > +                                        Error **errp)
> > > +{
> > > +    *topo = string_to_cpu_topo(topo_str);
> > > +
> > > +    if (*topo == CPU_TOPO_LEVEL_MAX || *topo == CPU_TOPO_LEVEL_INVALID) {
> > > +        error_setg(errp, "Invalid cache topology level: %s. The cache "
> > > +                   "topology should match the CPU topology level", topo_str);
> > > +        return -1;
> > > +    }
> > > +
> > > +    if (!machine_check_topo_support(ms, *topo)) {
> > > +        error_setg(errp, "Invalid cache topology level: %s. The topology "
> > > +                   "level is not supported by this machine", topo_str);
> > > +        return -1;
> > > +    }
> > > +
> > > +    return 0;
> > > +}
> > > +
> > > +static void machine_parse_smp_cache_config(MachineState *ms,
> > > +                                           const SMPConfiguration *config,
> > > +                                           Error **errp)
> > > +{
> > > +    MachineClass *mc = MACHINE_GET_CLASS(ms);
> > > +
> > > +    if (config->l1d_cache) {
> > > +        if (!mc->smp_props.l1_separated_cache_supported) {
> > > +            error_setg(errp, "L1 D-cache topology not "
> > > +                       "supported by this machine");
> > > +            return;
> > > +        }
> > > +
> > > +        if (smp_cache_string_to_topology(ms, config->l1d_cache,
> > > +            &ms->smp_cache.l1d, errp)) {
> > 
> > Indent is to wrong opening bracket.
> > Same for other cases.
> 
> Could you please educate me about the correct style here?
> I'm unsure if it should be indented by 4 spaces.

It needs to look like this:

        if (smp_cache_string_to_topology(ms, config->l1d_cache,
                                         &ms->smp_cache.l1d, errp)) {

so func parameters are aligned to the function calls' opening bracket,
not the 'if' statement's opening bracket.


With regards,
Daniel
-- 
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  reply	other threads:[~2024-02-27  9:16 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-20  9:24 [RFC 0/8] Introduce SMP Cache Topology Zhao Liu
2024-02-20  9:24 ` [RFC 1/8] hw/core: Rename CpuTopology to CPUTopology Zhao Liu
2024-02-20  9:24 ` [RFC 2/8] hw/core: Move CPU topology enumeration into arch-agnostic file Zhao Liu
2024-02-28  9:53   ` JeeHeng Sia
2024-02-29  4:46     ` Zhao Liu
2024-02-20  9:24 ` [RFC 3/8] hw/core: Define cache topology for machine Zhao Liu
2024-02-20  9:25 ` [RFC 4/8] hw/core: Add cache topology options in -smp Zhao Liu
2024-02-21 12:46   ` Markus Armbruster
2024-02-21 15:17     ` Zhao Liu
2024-02-26 15:39   ` Jonathan Cameron via
2024-02-27  9:20     ` Zhao Liu
2024-02-27  9:12       ` Daniel P. Berrangé [this message]
2024-02-27 10:35         ` Zhao Liu
2024-02-27 10:51       ` Jonathan Cameron via
2024-02-27 15:55         ` Zhao Liu
2024-02-28  5:38   ` JeeHeng Sia
2024-02-29  7:04     ` Zhao Liu
2024-02-20  9:25 ` [RFC 5/8] i386/cpu: Support thread and module level cache topology Zhao Liu
2024-02-20  9:25 ` [RFC 6/8] i386/cpu: Update cache topology with machine's configuration Zhao Liu
2024-02-28  9:45   ` JeeHeng Sia
2024-02-29  7:19     ` Zhao Liu
2024-02-20  9:25 ` [RFC 7/8] i386/pc: Support cache topology in -smp for PC machine Zhao Liu
2024-02-20  9:25 ` [RFC 8/8] qemu-options: Add the cache topology description of -smp Zhao Liu
2024-02-26 15:47   ` Jonathan Cameron via
2024-02-27 16:17     ` Zhao Liu
2024-02-20 20:07 ` [RFC 0/8] Introduce SMP Cache Topology Philippe Mathieu-Daudé

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