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From: Zhao Liu <zhao1.liu@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: qemu-devel@nongnu.org, richard.henderson@linaro.org, mcb30@ipxe.org
Subject: Re: [PATCH v2 3/7] target/i386: introduce function to query MMU indices
Date: Mon, 26 Feb 2024 16:05:56 +0800	[thread overview]
Message-ID: <ZdxGZPMXAB5rTIZl@intel.com> (raw)
In-Reply-To: <20240223130948.237186-4-pbonzini@redhat.com>

On Fri, Feb 23, 2024 at 02:09:44PM +0100, Paolo Bonzini wrote:
> Date: Fri, 23 Feb 2024 14:09:44 +0100
> From: Paolo Bonzini <pbonzini@redhat.com>
> Subject: [PATCH v2 3/7] target/i386: introduce function to query MMU indices
> X-Mailer: git-send-email 2.43.0
> 
> Remove knowledge of specific MMU indexes (other than MMU_NESTED_IDX and
> MMU_PHYS_IDX) from mmu_translate().  This will make it possible to split
> 32-bit and 64-bit MMU indexes.
> 
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>  target/i386/cpu.h                    | 10 ++++++++++
>  target/i386/tcg/sysemu/excp_helper.c |  4 ++--
>  2 files changed, 12 insertions(+), 2 deletions(-)

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>

> 
> diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> index dfe43b82042..8c271ca62e5 100644
> --- a/target/i386/cpu.h
> +++ b/target/i386/cpu.h
> @@ -2305,6 +2305,16 @@ uint64_t cpu_get_tsc(CPUX86State *env);
>  #define MMU_NESTED_IDX  3
>  #define MMU_PHYS_IDX    4
>  
> +static inline bool is_mmu_index_smap(int mmu_index)
> +{
> +    return mmu_index == MMU_KSMAP_IDX;
> +}
> +
> +static inline bool is_mmu_index_user(int mmu_index)
> +{
> +    return mmu_index == MMU_USER_IDX;
> +}
> +
>  static inline int cpu_mmu_index_kernel(CPUX86State *env)
>  {
>      return !(env->hflags & HF_SMAP_MASK) ? MMU_KNOSMAP_IDX :
> diff --git a/target/i386/tcg/sysemu/excp_helper.c b/target/i386/tcg/sysemu/excp_helper.c
> index 11126c860d4..a0d5ce39300 100644
> --- a/target/i386/tcg/sysemu/excp_helper.c
> +++ b/target/i386/tcg/sysemu/excp_helper.c
> @@ -137,7 +137,7 @@ static bool mmu_translate(CPUX86State *env, const TranslateParams *in,
>      const int32_t a20_mask = x86_get_a20_mask(env);
>      const target_ulong addr = in->addr;
>      const int pg_mode = in->pg_mode;
> -    const bool is_user = (in->mmu_idx == MMU_USER_IDX);
> +    const bool is_user = is_mmu_index_user(in->mmu_idx);
>      const MMUAccessType access_type = in->access_type;
>      uint64_t ptep, pte, rsvd_mask;
>      PTETranslate pte_trans = {
> @@ -363,7 +363,7 @@ do_check_protect_pse36:
>      }
>  
>      int prot = 0;
> -    if (in->mmu_idx != MMU_KSMAP_IDX || !(ptep & PG_USER_MASK)) {
> +    if (!is_mmu_index_smap(in->mmu_idx) || !(ptep & PG_USER_MASK)) {
>          prot |= PAGE_READ;
>          if ((ptep & PG_RW_MASK) || !(is_user || (pg_mode & PG_MODE_WP))) {
>              prot |= PAGE_WRITE;
> -- 
> 2.43.0
> 
> 


  reply	other threads:[~2024-02-26  7:52 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-23 13:09 [PATCH v2 0/7] target/i386: Fix physical address masking bugs Paolo Bonzini
2024-02-23 13:09 ` [PATCH v2 1/7] target/i386: mask high bits of CR3 in 32-bit mode Paolo Bonzini
2024-02-26  8:04   ` Zhao Liu
2024-02-23 13:09 ` [PATCH v2 2/7] target/i386: check validity of VMCB addresses Paolo Bonzini
2024-02-23 13:09 ` [PATCH v2 3/7] target/i386: introduce function to query MMU indices Paolo Bonzini
2024-02-26  8:05   ` Zhao Liu [this message]
2024-02-23 13:09 ` [PATCH v2 4/7] target/i386: use separate MMU indexes for 32-bit accesses Paolo Bonzini
2024-02-26  8:36   ` Zhao Liu
2024-02-26  9:55     ` Paolo Bonzini
2024-02-26 12:59       ` Zhao Liu
2024-02-23 13:09 ` [PATCH v2 5/7] target/i386: Fix physical address truncation Paolo Bonzini
2024-02-26  8:31   ` Zhao Liu
2024-02-23 13:09 ` [PATCH v2 6/7] target/i386: remove unnecessary/wrong application of the A20 mask Paolo Bonzini
2024-02-23 13:09 ` [PATCH v2 7/7] target/i386: leave the A20 bit set in the final NPT walk Paolo Bonzini
2024-02-23 17:57 ` [PATCH v2 0/7] target/i386: Fix physical address masking bugs Michael Brown

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