From: "Daniel P. Berrangé" <berrange@redhat.com>
To: Zhao Liu <zhao1.liu@intel.com>
Cc: Lei Wang <lei4.wang@intel.com>,
qemu-devel@nongnu.org, pbonzini@redhat.com,
manish.mishra@nutanix.com, xiaoyao.li@intel.com,
chenyi.qiang@intel.com, tao1.su@linux.intel.com
Subject: Re: [PATCH] target/i386: Introduce SapphireRapids-v3 to add missing features
Date: Wed, 24 Apr 2024 09:25:39 +0100 [thread overview]
Message-ID: <ZijCAz19K6-Y29uF@redhat.com> (raw)
In-Reply-To: <ZijDx4m117yv64JK@intel.com>
On Wed, Apr 24, 2024 at 04:33:11PM +0800, Zhao Liu wrote:
> Hi Lei,
>
> On Wed, Apr 24, 2024 at 03:29:12AM -0400, Lei Wang wrote:
> > Date: Wed, 24 Apr 2024 03:29:12 -0400
> > From: Lei Wang <lei4.wang@intel.com>
> > Subject: [PATCH] target/i386: Introduce SapphireRapids-v3 to add missing
> > features
> > X-Mailer: git-send-email 2.39.3
> >
> > Add the missing features(ss, tsc-adjust, cldemote, movdiri, movdir64b) in
> > the SapphireRapids-v3 CPU model.
>
> Considering that these are missing features, not hardware updates/fixes/Linux
> support changes, then as opposed to adding v3, it would be more appropriate
> to add these flags directly to the v1 SPR model with Fixes tag (Fixes:
> commit 7eb061b06e97 ("i386: Add new CPU model SapphireRapids")).
That would break compatibility with v1 CPU models from existing releases
of QEMU. Once released, a CPU version is read-only to preserve compatibility,
which is why we have the CPU versioning concept.
With regards,
Daniel
--
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prev parent reply other threads:[~2024-04-24 8:26 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-24 7:29 [PATCH] target/i386: Introduce SapphireRapids-v3 to add missing features Lei Wang
2024-04-24 8:20 ` Paolo Bonzini
2024-04-24 8:33 ` Zhao Liu
2024-04-24 8:25 ` Daniel P. Berrangé [this message]
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