From: Zhao Liu <zhao1.liu@intel.com>
To: Zide Chen <zide.chen@intel.com>
Cc: qemu-devel@nongnu.org, pbonzini@redhat.com, mst@redhat.com,
thuth@redhat.com, cfontana@suse.de, xiaoyao.li@intel.com,
qemu-trivial@nongnu.org
Subject: Re: [PATCH V2 3/3] target/i386: Move host_cpu_enable_cpu_pm into kvm_cpu_realizefn()
Date: Fri, 31 May 2024 14:53:22 +0800 [thread overview]
Message-ID: <Zllz4qFpVqrLJXXt@intel.com> (raw)
In-Reply-To: <20240524200017.150339-4-zide.chen@intel.com>
On Fri, May 24, 2024 at 01:00:17PM -0700, Zide Chen wrote:
> Date: Fri, 24 May 2024 13:00:17 -0700
> From: Zide Chen <zide.chen@intel.com>
> Subject: [PATCH V2 3/3] target/i386: Move host_cpu_enable_cpu_pm into
> kvm_cpu_realizefn()
> X-Mailer: git-send-email 2.34.1
>
> It seems not a good idea to expand features in host_cpu_realizefn,
> which is for host CPU only.
It is restricted by max_features and should be part of the "max" CPU,
and the current target/i386/host-cpu.c should only serve the “host” CPU.
> Additionally, cpu-pm option is KVM
> specific, and it's cleaner to put it in kvm_cpu_realizefn(), together
> with the WAITPKG code.
>
> Fixes: f5cc5a5c1686 ("i386: split cpu accelerators from cpu.c, using AccelCPUClass")
> Signed-off-by: Zide Chen <zide.chen@intel.com>
> ---
> target/i386/host-cpu.c | 12 ------------
> target/i386/kvm/kvm-cpu.c | 11 +++++++++--
> 2 files changed, 9 insertions(+), 14 deletions(-)
>
> diff --git a/target/i386/host-cpu.c b/target/i386/host-cpu.c
> index 280e427c017c..8b8bf5afeccf 100644
> --- a/target/i386/host-cpu.c
> +++ b/target/i386/host-cpu.c
> @@ -42,15 +42,6 @@ static uint32_t host_cpu_phys_bits(void)
> return host_phys_bits;
> }
>
> -static void host_cpu_enable_cpu_pm(X86CPU *cpu)
> -{
> - CPUX86State *env = &cpu->env;
> -
> - host_cpuid(5, 0, &cpu->mwait.eax, &cpu->mwait.ebx,
> - &cpu->mwait.ecx, &cpu->mwait.edx);
> - env->features[FEAT_1_ECX] |= CPUID_EXT_MONITOR;
> -}
> -
> static uint32_t host_cpu_adjust_phys_bits(X86CPU *cpu)
> {
> uint32_t host_phys_bits = host_cpu_phys_bits();
> @@ -83,9 +74,6 @@ bool host_cpu_realizefn(CPUState *cs, Error **errp)
> X86CPU *cpu = X86_CPU(cs);
> CPUX86State *env = &cpu->env;
>
> - if (cpu->max_features && enable_cpu_pm) {
> - host_cpu_enable_cpu_pm(cpu);
> - }
> if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) {
> uint32_t phys_bits = host_cpu_adjust_phys_bits(cpu);
>
> diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c
> index 3adcedf0dbc3..197c892da89a 100644
> --- a/target/i386/kvm/kvm-cpu.c
> +++ b/target/i386/kvm/kvm-cpu.c
> @@ -64,9 +64,16 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp)
> * cpu_common_realizefn() (via xcc->parent_realize)
> */
> if (cpu->max_features) {
> - if (enable_cpu_pm && kvm_has_waitpkg()) {
> - env->features[FEAT_7_0_ECX] |= CPUID_7_0_ECX_WAITPKG;
> + if (enable_cpu_pm) {
> + if (kvm_has_waitpkg()) {
> + env->features[FEAT_7_0_ECX] |= CPUID_7_0_ECX_WAITPKG;
> + }
If you agree with my comment in patch 2, here we need a mwait bit check.
> + host_cpuid(5, 0, &cpu->mwait.eax, &cpu->mwait.ebx,
> + &cpu->mwait.ecx, &cpu->mwait.edx);
> + env->features[FEAT_1_ECX] |= CPUID_EXT_MONITOR;
> }
> +
> if (cpu->ucode_rev == 0) {
> cpu->ucode_rev =
> kvm_arch_get_supported_msr_feature(kvm_state,
> --
> 2.34.1
>
>
next prev parent reply other threads:[~2024-05-31 6:39 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-24 20:00 [PATCH V2 0/3] improve -overcommit cpu-pm=on|off Zide Chen
2024-05-24 20:00 ` [PATCH V2 1/3] vl: Allow multiple -overcommit commands Zide Chen
2024-05-27 5:19 ` Thomas Huth
2024-05-30 14:01 ` Zhao Liu
2024-05-31 4:57 ` Thomas Huth
2024-06-03 8:44 ` Markus Armbruster
2024-05-30 13:39 ` Zhao Liu
2024-05-24 20:00 ` [PATCH V2 2/3] target/i386: call cpu_exec_realizefn before x86_cpu_filter_features Zide Chen
2024-05-31 6:30 ` Zhao Liu
2024-05-31 17:13 ` Chen, Zide
2024-06-01 15:26 ` Zhao Liu
2024-06-03 9:30 ` Igor Mammedov
2024-06-03 21:29 ` Chen, Zide
2024-06-05 15:07 ` Igor Mammedov
2024-06-05 17:58 ` Chen, Zide
2024-06-03 21:29 ` Chen, Zide
2024-05-24 20:00 ` [PATCH V2 3/3] target/i386: Move host_cpu_enable_cpu_pm into kvm_cpu_realizefn() Zide Chen
2024-05-31 6:53 ` Zhao Liu [this message]
2024-05-31 17:13 ` Chen, Zide
2024-05-28 9:23 ` [PATCH V2 0/3] improve -overcommit cpu-pm=on|off Igor Mammedov
2024-05-28 18:16 ` Chen, Zide
2024-05-29 12:46 ` Igor Mammedov
2024-05-29 17:31 ` Chen, Zide
2024-05-30 13:54 ` Zhao Liu
2024-05-30 14:34 ` Igor Mammedov
2024-05-30 14:53 ` Sean Christopherson
2024-05-30 14:49 ` Igor Mammedov
2024-06-02 21:54 ` Michael S. Tsirkin
2024-05-30 16:15 ` Chen, Zide
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Zllz4qFpVqrLJXXt@intel.com \
--to=zhao1.liu@intel.com \
--cc=cfontana@suse.de \
--cc=mst@redhat.com \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-trivial@nongnu.org \
--cc=thuth@redhat.com \
--cc=xiaoyao.li@intel.com \
--cc=zide.chen@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).