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Thu, 15 Aug 2024 23:56:06 -0700 (PDT) Date: Thu, 15 Aug 2024 23:56:03 -0700 From: Deepak Gupta To: Richard Henderson Cc: qemu-riscv@nongnu.org, qemu-devel@nongnu.org, palmer@dabbelt.com, Alistair.Francis@wdc.com, bmeng.cn@gmail.com, liwei1518@gmail.com, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, pbonzini@redhat.com, jim.shu@sifive.com, andy.chiu@sifive.com, kito.cheng@sifive.com Subject: Re: [PATCH v4 13/16] target/riscv: compressed encodings for sspush and sspopchk Message-ID: References: <20240816010711.3055425-1-debug@rivosinc.com> <20240816010711.3055425-14-debug@rivosinc.com> <794021c3-02f2-4b64-8d1c-a56125e09462@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Disposition: inline In-Reply-To: <794021c3-02f2-4b64-8d1c-a56125e09462@linaro.org> Received-SPF: pass client-ip=2607:f8b0:4864:20::533; envelope-from=debug@rivosinc.com; helo=mail-pg1-x533.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_TEMPERROR=0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Fri, Aug 16, 2024 at 03:09:10PM +1000, Richard Henderson wrote: >On 8/16/24 11:07, Deepak Gupta wrote: >>sspush/sspopchk have compressed encodings carved out of zcmops. >>compressed sspush is designated as c.mop.1 while compressed sspopchk >>is designated as c.mop.5. >> >>Note that c.sspush x1 exists while c.sspush x5 doesn't. Similarly >>c.sspopchk x5 exists while c.sspopchk x1 doesn't. >> >>Signed-off-by: Deepak Gupta >>Co-developed-by: Jim Shu >>Co-developed-by: Andy Chiu >>--- >> target/riscv/insn16.decode | 2 ++ >> target/riscv/insn_trans/trans_rvzicfiss.c.inc | 12 ++++++++++++ >> 2 files changed, 14 insertions(+) >> >>diff --git a/target/riscv/insn16.decode b/target/riscv/insn16.decode >>index 3953bcf82d..3b84a36233 100644 >>--- a/target/riscv/insn16.decode >>+++ b/target/riscv/insn16.decode >>@@ -140,6 +140,8 @@ sw 110 ... ... .. ... 00 @cs_w >> addi 000 . ..... ..... 01 @ci >> addi 010 . ..... ..... 01 @c_li >> { >>+ c_sspush 011 0 00001 00000 01 rs2=1 rs1=0 # c.sspush x1 carving out of zcmops >>+ c_sspopchk 011 0 00101 00000 01 rs1=5 rd=0 # c.sspopchk x5 carving out of zcmops >> c_mop_n 011 0 0 n:3 1 00000 01 >> illegal 011 0 ----- 00000 01 # c.addi16sp and c.lui, RES nzimm=0 >> addi 011 . 00010 ..... 01 @c_addi16sp >>diff --git a/target/riscv/insn_trans/trans_rvzicfiss.c.inc b/target/riscv/insn_trans/trans_rvzicfiss.c.inc >>index 05d439c1f6..67f5c7804a 100644 >>--- a/target/riscv/insn_trans/trans_rvzicfiss.c.inc >>+++ b/target/riscv/insn_trans/trans_rvzicfiss.c.inc >>@@ -109,3 +109,15 @@ static bool trans_sspush(DisasContext *ctx, arg_sspush *a) >> { >> return gen_sspush(ctx, a->rs2); >> } >>+ >>+static bool trans_c_sspopchk(DisasContext *ctx, arg_c_sspopchk *a) >>+{ >>+ assert(a->rs1 == 5); >>+ return gen_sspopchk(ctx, a->rs1); >>+} >>+ >>+static bool trans_c_sspush(DisasContext *ctx, arg_c_sspush *a) >>+{ >>+ assert(a->rs2 == 1); >>+ return gen_sspush(ctx, a->rs2); >>+} > >This indirection is pointless. Have the decoder invoke the proper >insn in the first place. Identically with how we're treating 'addi', >for instance. > I was getting compilation error. How to reconcile with arugment sets between insn32.decode and insn16.decode. Earlier I was doing that and didn't need it. But after removing indirection in arguments and using single use format, type for structs instruction arguments ends up conflicting and compiler complains. > >r~ >