[PATCH] target/hppa: Fix PSW V-bit packaging in cpu_hppa_get for hppa64

[PATCH] target/hppa: Fix PSW V-bit packaging in cpu_hppa_get for hppa64

[Helge Deller]

While adding hppa64 support, the psw_v variable got extended from 32 to 64
bits.  So, when packaging the PSW-V bit from the psw_v variable for interrupt
processing, check bit 31 instead the 63th (sign) bit.

This fixes a hard to find Linux kernel boot issue where the loss of the PSW-V
bit due to an ITLB interruption in the middle of a series of ds/addc
instructions (from the divU milicode library) generated the wrong division
result and thus triggered a Linux kernel crash.

Link: https://lore.kernel.org/lkml/718b8afe-222f-4b3a-96d3-93af0e4ceff1@roeck-us.net/
Reported-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Helge Deller <deller@gmx.de>
Fixes: 931adff31478 ("target/hppa: Update cpu_hppa_get/put_psw for hppa64")

diff --git a/target/hppa/helper.c b/target/hppa/helper.c
index b79ddd8184..d4b1a3cd5a 100644
--- a/target/hppa/helper.c
+++ b/target/hppa/helper.c
@@ -53,7 +53,7 @@ target_ulong cpu_hppa_get_psw(CPUHPPAState *env)
     }
 
     psw |= env->psw_n * PSW_N;
-    psw |= (env->psw_v < 0) * PSW_V;
+    psw |= ((env->psw_v >> 31) & 1) * PSW_V;
     psw |= env->psw | env->psw_xb;
 
     return psw;

Re: [PATCH] target/hppa: Fix PSW V-bit packaging in cpu_hppa_get for hppa64

[Guenter Roeck]

On 9/3/24 03:28, Helge Deller wrote:
> While adding hppa64 support, the psw_v variable got extended from 32 to 64
> bits.  So, when packaging the PSW-V bit from the psw_v variable for interrupt
> processing, check bit 31 instead the 63th (sign) bit.
> 
> This fixes a hard to find Linux kernel boot issue where the loss of the PSW-V
> bit due to an ITLB interruption in the middle of a series of ds/addc
> instructions (from the divU milicode library) generated the wrong division
> result and thus triggered a Linux kernel crash.
> 
> Link: https://lore.kernel.org/lkml/718b8afe-222f-4b3a-96d3-93af0e4ceff1@roeck-us.net/
> Reported-by: Guenter Roeck <linux@roeck-us.net>
> Signed-off-by: Helge Deller <deller@gmx.de>
> Fixes: 931adff31478 ("target/hppa: Update cpu_hppa_get/put_psw for hppa64")

Tested-by: Guenter Roeck <linux@roeck-us.net>

Thanks!
Guenter

> 
> diff --git a/target/hppa/helper.c b/target/hppa/helper.c
> index b79ddd8184..d4b1a3cd5a 100644
> --- a/target/hppa/helper.c
> +++ b/target/hppa/helper.c
> @@ -53,7 +53,7 @@ target_ulong cpu_hppa_get_psw(CPUHPPAState *env)
>       }
>   
>       psw |= env->psw_n * PSW_N;
> -    psw |= (env->psw_v < 0) * PSW_V;
> +    psw |= ((env->psw_v >> 31) & 1) * PSW_V;
>       psw |= env->psw | env->psw_xb;
>   
>       return psw;

Re: [PATCH] target/hppa: Fix PSW V-bit packaging in cpu_hppa_get for hppa64

[Richard Henderson]

On 9/3/24 03:28, Helge Deller wrote:
> While adding hppa64 support, the psw_v variable got extended from 32 to 64
> bits.  So, when packaging the PSW-V bit from the psw_v variable for interrupt
> processing, check bit 31 instead the 63th (sign) bit.
> 
> This fixes a hard to find Linux kernel boot issue where the loss of the PSW-V
> bit due to an ITLB interruption in the middle of a series of ds/addc
> instructions (from the divU milicode library) generated the wrong division
> result and thus triggered a Linux kernel crash.
> 
> Link: https://lore.kernel.org/lkml/718b8afe-222f-4b3a-96d3-93af0e4ceff1@roeck-us.net/
> Reported-by: Guenter Roeck <linux@roeck-us.net>
> Signed-off-by: Helge Deller <deller@gmx.de>
> Fixes: 931adff31478 ("target/hppa: Update cpu_hppa_get/put_psw for hppa64")
> 
> diff --git a/target/hppa/helper.c b/target/hppa/helper.c
> index b79ddd8184..d4b1a3cd5a 100644
> --- a/target/hppa/helper.c
> +++ b/target/hppa/helper.c
> @@ -53,7 +53,7 @@ target_ulong cpu_hppa_get_psw(CPUHPPAState *env)
>       }
>   
>       psw |= env->psw_n * PSW_N;
> -    psw |= (env->psw_v < 0) * PSW_V;
> +    psw |= ((env->psw_v >> 31) & 1) * PSW_V;
>       psw |= env->psw | env->psw_xb;
>   
>       return psw;

While this is correct, we should also update cpu.h:

-    target_long psw_v;       /* in most significant bit */
+    target_long psw_v;       /* in bit 31 */

With that,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~