From: Zhao Liu <zhao1.liu@intel.com>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: "Daniel P . Berrangé" <berrange@redhat.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Yanan Wang" <wangyanan55@huawei.com>,
"Michael S.Tsirkin" <mst@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Eric Blake" <eblake@redhat.com>,
"Markus Armbruster" <armbru@redhat.com>,
"Marcelo Tosatti" <mtosatti@redhat.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Sia Jee Heng" <jeeheng.sia@starfivetech.com>,
"Alireza Sanaee" <alireza.sanaee@huawei.com>,
qemu-devel@nongnu.org, kvm@vger.kernel.org,
qemu-riscv@nongnu.org, qemu-arm@nongnu.org,
"Zhenyu Wang" <zhenyu.z.wang@intel.com>,
"Dapeng Mi" <dapeng1.mi@linux.intel.com>,
"Yongwei Ma" <yongwei.ma@intel.com>,
"Zhao Liu" <zhao1.liu@intel.com>
Subject: Re: [PATCH v2 3/7] hw/core: Add smp cache topology for machine
Date: Mon, 7 Oct 2024 19:02:19 +0800 [thread overview]
Message-ID: <ZwO/u0T+65b2/cFg@intel.com> (raw)
In-Reply-To: <20240917100048.00001bcf@Huawei.com>
On Tue, Sep 17, 2024 at 10:00:48AM +0100, Jonathan Cameron wrote:
> Date: Tue, 17 Sep 2024 10:00:48 +0100
> From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
> Subject: Re: [PATCH v2 3/7] hw/core: Add smp cache topology for machine
> X-Mailer: Claws Mail 4.1.0 (GTK 3.24.33; x86_64-w64-mingw32)
>
> On Sun, 8 Sep 2024 20:59:16 +0800
> Zhao Liu <zhao1.liu@intel.com> wrote:
>
> > With smp-cache object support, add smp cache topology for machine by
> > linking the smp-cache object.
> >
> > Also add a helper to access cache topology level.
> >
> > Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
> > Tested-by: Yongwei Ma <yongwei.ma@intel.com>
>
> Minor stuff. The property stuff is something I seems to mostly get wrong
> so needs more eyes but fwiw looks fine to me.
Yes and thank you!
> With the tweaks suggested below.
>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>
> > ---
> > Changes since Patch v1:
> > * Integrated cache properties list into MachineState and used -machine
> > to configure SMP cache properties. (Markus)
> >
> > Changes since RFC v2:
> > * Linked machine's smp_cache to smp-cache object instead of a builtin
> > structure. This is to get around the fact that the keyval format of
> > -machine can't support JSON.
> > * Wrapped the cache topology level access into a helper.
> > ---
> > hw/core/machine-smp.c | 41 ++++++++++++++++++++++++++++++++++++++++
> > hw/core/machine.c | 44 +++++++++++++++++++++++++++++++++++++++++++
> > include/hw/boards.h | 10 ++++++++++
> > 3 files changed, 95 insertions(+)
> >
> > diff --git a/hw/core/machine-smp.c b/hw/core/machine-smp.c
> > index 5d8d7edcbd3f..b517c3471d1a 100644
> > --- a/hw/core/machine-smp.c
> > +++ b/hw/core/machine-smp.c
> > @@ -261,6 +261,41 @@ void machine_parse_smp_config(MachineState *ms,
> > }
> > }
> >
> > +bool machine_parse_smp_cache(MachineState *ms,
> > + const SmpCachePropertiesList *caches,
> > + Error **errp)
> > +{
> > + const SmpCachePropertiesList *node;
> > + DECLARE_BITMAP(caches_bitmap, CACHE_LEVEL_AND_TYPE__MAX);
> > +
> > + for (node = caches; node; node = node->next) {
> > + /* Prohibit users from setting the cache topology level to invalid. */
> > + if (node->value->topology == CPU_TOPOLOGY_LEVEL_INVALID) {
> > + error_setg(errp,
> > + "Invalid cache topology level: %s. "
> > + "The topology should match the "
> > + "valid CPU topology level",
>
> I think that's too much wrapping for an error message. Makes them hard
> to grep for.
I understand you mean the last sentence should not be on separate lines
but should be continuous in one line, right?
> > + CpuTopologyLevel_str(node->value->topology));
> > + return false;
> > + }
> > +
> > + /* Prohibit users from repeating settings. */
> > + if (test_bit(node->value->cache, caches_bitmap)) {
> > + error_setg(errp,
> > + "Invalid cache properties: %s. "
> > + "The cache properties are duplicated",
> > + CacheLevelAndType_str(node->value->cache));
> > + return false;
> > + } else {
>
> returned anyway in the above path, so can drop the else and reduce
> indent a little.
Sure.
Thanks,
Zhao
> > + ms->smp_cache.props[node->value->cache].topology =
> > + node->value->topology;
> > + set_bit(node->value->cache, caches_bitmap);
> > + }
> > + }
> > +
> > + return true;
> > +}
> > +
>
>
next prev parent reply other threads:[~2024-10-07 10:47 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-08 12:59 [PATCH v2 0/7] Introduce SMP Cache Topology Zhao Liu
2024-09-08 12:59 ` [PATCH v2 1/7] hw/core: Make CPU topology enumeration arch-agnostic Zhao Liu
2024-09-08 12:59 ` [PATCH v2 2/7] qapi/qom: Define cache enumeration and properties Zhao Liu
[not found] ` <20240917095126.000036f1@Huawei.com>
2024-10-07 10:48 ` Zhao Liu
2024-09-08 12:59 ` [PATCH v2 3/7] hw/core: Add smp cache topology for machine Zhao Liu
[not found] ` <20240917100048.00001bcf@Huawei.com>
2024-10-07 11:02 ` Zhao Liu [this message]
2024-09-08 12:59 ` [PATCH v2 4/7] hw/core: Check smp cache topology support " Zhao Liu
[not found] ` <20240917095612.00007b5a@Huawei.com>
2024-10-07 11:12 ` Zhao Liu
2024-09-08 12:59 ` [PATCH v2 5/7] i386/cpu: Support thread and module level cache topology Zhao Liu
[not found] ` <20240917100508.00001907@Huawei.com>
2024-10-07 11:24 ` Zhao Liu
2024-09-08 12:59 ` [PATCH v2 6/7] i386/cpu: Update cache topology with machine's configuration Zhao Liu
[not found] ` <20240911110028.00001d3d@huawei.com>
2024-10-07 10:21 ` Zhao Liu
[not found] ` <20240917100641.000050a8@Huawei.com>
2024-10-07 11:25 ` Zhao Liu
2024-09-08 12:59 ` [PATCH v2 7/7] i386/pc: Support cache topology in -machine for PC machine Zhao Liu
[not found] ` <20240917101631.00003dcb@Huawei.com>
2024-10-07 11:53 ` Zhao Liu
2024-09-10 18:23 ` [PATCH v2 0/7] Introduce SMP Cache Topology Michael S. Tsirkin
2024-12-17 14:23 ` Alireza Sanaee via
2024-12-17 16:20 ` Zhao Liu
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