From: Zhao Liu <zhao1.liu@intel.com>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Markus Armbruster <armbru@redhat.com>
Cc: "Daniel P . Berrang�" <berrange@redhat.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Philippe Mathieu-Daud�" <philmd@linaro.org>,
"Yanan Wang" <wangyanan55@huawei.com>,
"Michael S.Tsirkin " <mst@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Eric Blake" <eblake@redhat.com>,
"Marcelo Tosatti" <mtosatti@redhat.com>,
"Alex Benn�e" <alex.bennee@linaro.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Sia Jee Heng" <jeeheng.sia@starfivetech.com>,
"Alireza Sanaee" <alireza.sanaee@huawei.com>,
qemu-devel@nongnu.org, kvm@vger.kernel.org,
qemu-riscv@nongnu.org, qemu-arm@nongnu.org,
"Zhenyu Wang" <zhenyu.z.wang@intel.com>,
"Dapeng Mi" <dapeng1.mi@linux.intel.com>,
"Yongwei Ma" <yongwei.ma@intel.com>,
"Zhao Liu" <zhao1.liu@intel.com>
Subject: Re: [PATCH v3 1/7] hw/core: Make CPU topology enumeration arch-agnostic
Date: Thu, 17 Oct 2024 22:51:07 +0800 [thread overview]
Message-ID: <ZxEkW84fcf4pCK0w@intel.com> (raw)
In-Reply-To: <20241017142013.00006c41@Huawei.com>
(Ping Markus)
> > > +
> > > +##
> > > +# @CpuTopologyLevel:
> > > +#
> > > +# An enumeration of CPU topology levels.
> > > +#
> > > +# @invalid: Invalid topology level.
> >
> > Really trivial but why a capital I on Invalid here but not the
> > t of thread below?
Oops, thank you! It should be "invalid".
If Markus doesn't veto this version :), I'll standardize the case issues
in this file later. Some cases are uppercase, while others are lowercase.
> > > +#
> > > +# @thread: thread level, which would also be called SMT level or
> > > +# logical processor level. The @threads option in
> > > +# SMPConfiguration is used to configure the topology of this
> > > +# level.
> >
>
next prev parent reply other threads:[~2024-10-17 14:35 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-12 10:44 [PATCH v3 0/7] Introduce SMP Cache Topology Zhao Liu
2024-10-12 10:44 ` [PATCH v3 1/7] hw/core: Make CPU topology enumeration arch-agnostic Zhao Liu
[not found] ` <20241017095227.00006d85@Huawei.com>
2024-10-17 13:20 ` Jonathan Cameron via
2024-10-17 14:51 ` Zhao Liu [this message]
2024-10-17 15:30 ` Daniel P. Berrangé
2024-10-18 2:36 ` Zhao Liu
2024-10-18 7:55 ` Daniel P. Berrangé
2024-10-18 9:01 ` Zhao Liu
2024-10-17 16:19 ` Marcin Juszkiewicz
2024-10-18 4:26 ` Zhao Liu
2024-10-12 10:44 ` [PATCH v3 2/7] qapi/qom: Define cache enumeration and properties for machine Zhao Liu
2024-10-12 10:44 ` [PATCH v3 3/7] hw/core: Check smp cache topology support " Zhao Liu
2024-10-12 10:44 ` [PATCH v3 4/7] i386/cpu: Support thread and module level cache topology Zhao Liu
2024-10-12 10:44 ` [PATCH v3 5/7] i386/cpu: Update cache topology with machine's configuration Zhao Liu
2024-10-12 10:44 ` [PATCH v3 6/7] i386/pc: Support cache topology in -machine for PC machine Zhao Liu
2024-10-17 15:27 ` Daniel P. Berrangé
2024-10-18 3:57 ` Zhao Liu
2024-10-18 7:58 ` Daniel P. Berrangé
2024-10-18 9:03 ` Zhao Liu
2024-10-12 10:44 ` [PATCH v3 7/7] i386/cpu: add has_caches flag to check smp_cache configuration Zhao Liu
2024-10-17 13:16 ` Jonathan Cameron via
2024-10-17 13:19 ` [PATCH v3 0/7] Introduce SMP Cache Topology Jonathan Cameron via
[not found] ` <20241017141402.0000135b@Huawei.com>
2024-10-17 15:01 ` Zhao Liu
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