From: Zhao Liu <zhao1.liu@intel.com>
To: "Jonathan Cameron" <Jonathan.Cameron@huawei.com>,
"Daniel P . Berrangé" <berrange@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Markus Armbruster" <armbru@redhat.com>
Cc: "Igor Mammedov" <imammedo@redhat.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
Philippe =?ISO-8859-1?Q?Ma?= =?ISO-8859-1?Q?thieu-Daud=E9?=
<philmd@linaro.org>, "Yanan Wang" <wangyanan55@huawei.com>,
"Michael S.Tsirkin" <mst@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Eric Blake" <eblake@redhat.com>,
"Marcelo Tosatti" <mtosatti@redhat.com>,
Alex =?ISO-8859-1?Q?Benn=E9e?= <alex.bennee@linaro.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Sia Jee Heng" <jeeheng.sia@starfivetech.com>,
"Alireza Sanaee" <alireza.sanaee@huawei.com>,
qemu-devel@nongnu.org, kvm@vger.kernel.org,
qemu-riscv@nongnu.org, qemu-arm@nongnu.org,
"Zhenyu Wang" <zhenyu.z.wang@intel.com>,
"Dapeng Mi" <dapeng1.mi@linux.intel.com>,
"Zhao Liu" <zhao1.liu@intel.com>
Subject: Re: [PATCH v3 0/7] Introduce SMP Cache Topology
Date: Thu, 17 Oct 2024 23:01:26 +0800 [thread overview]
Message-ID: <ZxEmxkwQythD6ILI@intel.com> (raw)
In-Reply-To: <20241017141402.0000135b@Huawei.com>
(Cc and gentlely ping QOM & QAPI maintainers :) )
> > Meanwhile, ARM side has also worked a lot on the smp-cache based on
> > this series [2], so I think we are very close to the final merge, to
> > catch up with this cycle. :)
>
> This would finally solve a long standing missing control for our
> virtualization usecases (TCG and MPAM stuff is an added bonus),
> so I'm very keen in this making 9.2 (and maybe even the ARM part
> of things happen to move fast enough). Ali is out this week,
> but should be back sometime next week. Looks like rebase of his
> ARM patches on this should be simple!
>
> I think this set mostly needs a QAPI review (perhaps from Markus?)
Michael mentioned this series also need QOM maintainer's review. So I
pinged maintainers at the beginning of this reply.
> >
> > This series is based on the commit 7e3b6d8063f2 ("Merge tag 'crypto-
> > fixes-pull-request' of https://gitlab.com/berrange/qemu into staging").
> >
> > Background
> > ==========
> >
> > The x86 and ARM (RISCV) need to allow user to configure cache properties
> *laughs*. I definitely going to start emailing ARM folk with
> ARM (RISCV)
> :)
:) I remembered you discussing cache topology with Sia (from RISCV).
Thanks,
Zhao
prev parent reply other threads:[~2024-10-17 14:46 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-12 10:44 [PATCH v3 0/7] Introduce SMP Cache Topology Zhao Liu
2024-10-12 10:44 ` [PATCH v3 1/7] hw/core: Make CPU topology enumeration arch-agnostic Zhao Liu
[not found] ` <20241017095227.00006d85@Huawei.com>
2024-10-17 13:20 ` Jonathan Cameron via
2024-10-17 14:51 ` Zhao Liu
2024-10-17 15:30 ` Daniel P. Berrangé
2024-10-18 2:36 ` Zhao Liu
2024-10-18 7:55 ` Daniel P. Berrangé
2024-10-18 9:01 ` Zhao Liu
2024-10-17 16:19 ` Marcin Juszkiewicz
2024-10-18 4:26 ` Zhao Liu
2024-10-12 10:44 ` [PATCH v3 2/7] qapi/qom: Define cache enumeration and properties for machine Zhao Liu
2024-10-12 10:44 ` [PATCH v3 3/7] hw/core: Check smp cache topology support " Zhao Liu
2024-10-12 10:44 ` [PATCH v3 4/7] i386/cpu: Support thread and module level cache topology Zhao Liu
2024-10-12 10:44 ` [PATCH v3 5/7] i386/cpu: Update cache topology with machine's configuration Zhao Liu
2024-10-12 10:44 ` [PATCH v3 6/7] i386/pc: Support cache topology in -machine for PC machine Zhao Liu
2024-10-17 15:27 ` Daniel P. Berrangé
2024-10-18 3:57 ` Zhao Liu
2024-10-18 7:58 ` Daniel P. Berrangé
2024-10-18 9:03 ` Zhao Liu
2024-10-12 10:44 ` [PATCH v3 7/7] i386/cpu: add has_caches flag to check smp_cache configuration Zhao Liu
2024-10-17 13:16 ` Jonathan Cameron via
2024-10-17 13:19 ` [PATCH v3 0/7] Introduce SMP Cache Topology Jonathan Cameron via
[not found] ` <20241017141402.0000135b@Huawei.com>
2024-10-17 15:01 ` Zhao Liu [this message]
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