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From: Zhao Liu <zhao1.liu@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: qemu-devel@nongnu.org, tao1.su@linux.intel.com, xiaoyao.li@intel.com
Subject: Re: [PATCH 3/8] target/i386: return bool from x86_cpu_filter_features
Date: Wed, 30 Oct 2024 13:19:01 +0800	[thread overview]
Message-ID: <ZyHBxSqZVfDtT4q9@intel.com> (raw)
In-Reply-To: <20241029151858.550269-4-pbonzini@redhat.com>

[snip]

> @@ -7558,7 +7558,7 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
>   *
>   * Returns: 0 if all flags are supported by the host, non-zero otherwise.

Comment can be updated as well. :-)

Returns: true if any flag is not supported by the host, false otherwise.

>   */
> -static void x86_cpu_filter_features(X86CPU *cpu, bool verbose)
> +static bool x86_cpu_filter_features(X86CPU *cpu, bool verbose)
>  {
>      CPUX86State *env = &cpu->env;
>      FeatureWord w;
> @@ -7610,6 +7610,8 @@ static void x86_cpu_filter_features(X86CPU *cpu, bool verbose)
>              mark_unavailable_features(cpu, FEAT_7_0_EBX, CPUID_7_0_EBX_INTEL_PT, prefix);
>          }
>      }
> +
> +    return x86_cpu_have_filtered_features(cpu);
>  }
>  
>  static void x86_cpu_hyperv_realize(X86CPU *cpu)
> @@ -7707,14 +7709,14 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
>          }
>      }
>  
> -    x86_cpu_filter_features(cpu, cpu->check_cpuid || cpu->enforce_cpuid);
> -
> -    if (cpu->enforce_cpuid && x86_cpu_have_filtered_features(cpu)) {
> -        error_setg(&local_err,
> -                   accel_uses_host_cpuid() ?
> +    if (x86_cpu_filter_features(cpu, cpu->check_cpuid || cpu->enforce_cpuid)) {
> +        if (cpu->enforce_cpuid) {
> +            error_setg(&local_err,

It seems that we don't need local_err here, as this function already has
an errp parameter. I will clean up the error handling of this function
later.

> +                       accel_uses_host_cpuid() ?
>                         "Host doesn't support requested features" :
>                         "TCG doesn't support requested features");
> -        goto out;
> +            goto out;
> +        }
>      }

LGTM,

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>



  reply	other threads:[~2024-10-30  5:04 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-29 15:18 [PATCH v2 0/8] Add AVX10.1 CPUID support and GraniteRapids-v2 model Paolo Bonzini
2024-10-29 15:18 ` [PATCH 1/8] target/i386: cpu: set correct supported XCR0 features for TCG Paolo Bonzini
2024-10-30  2:56   ` Zhao Liu
2024-10-29 15:18 ` [PATCH 2/8] target/i386: do not rely on ExtSaveArea for accelerator-supported XCR0 bits Paolo Bonzini
2024-10-30  3:50   ` Zhao Liu
2024-10-29 15:18 ` [PATCH 3/8] target/i386: return bool from x86_cpu_filter_features Paolo Bonzini
2024-10-30  5:19   ` Zhao Liu [this message]
2024-10-29 15:18 ` [PATCH 4/8] target/i386: add AVX10 feature and AVX10 version property Paolo Bonzini
2024-10-30  3:05   ` Tao Su
2024-10-30  8:09     ` Zhao Liu
2024-10-30  8:44   ` Zhao Liu
2024-10-30  9:37     ` Tao Su
2024-10-30 13:21       ` Zhao Liu
2024-10-30 14:05         ` Tao Su
2024-10-30 15:55           ` Zhao Liu
2024-10-31  4:39             ` Tao Su
2024-10-31  5:52               ` Xiaoyao Li
2024-10-31  6:07                 ` Tao Su
2024-10-31  7:12                 ` Zhao Liu
2024-10-31  7:18               ` Zhao Liu
2024-10-31  7:19                 ` Tao Su
2024-10-29 15:18 ` [PATCH 5/8] target/i386: add CPUID.24 features for AVX10 Paolo Bonzini
2024-10-30  8:50   ` Zhao Liu
2024-10-29 15:18 ` [PATCH 6/8] target/i386: Add feature dependencies " Paolo Bonzini
2024-10-29 15:18 ` [PATCH 7/8] target/i386: Add AVX512 state when AVX10 is supported Paolo Bonzini
2024-10-29 20:11   ` Paolo Bonzini
2024-10-30  8:54   ` Zhao Liu
2024-10-29 15:18 ` [PATCH 8/8] target/i386: Introduce GraniteRapids-v2 model Paolo Bonzini
2024-10-30  3:18 ` [PATCH v2 0/8] Add AVX10.1 CPUID support and " Tao Su
2024-10-30  8:35   ` Paolo Bonzini
2024-10-30  8:52     ` Tao Su

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