From: Nicolin Chen <nicolinc@nvidia.com>
To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
Cc: Eric Auger <eric.auger@redhat.com>,
Mostafa Saleh <smostafa@google.com>,
"qemu-arm@nongnu.org" <qemu-arm@nongnu.org>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
Peter Maydell <peter.maydell@linaro.org>,
"Jason Gunthorpe" <jgg@nvidia.com>,
Jean-Philippe Brucker <jean-philippe@linaro.org>,
Moritz Fischer <mdf@kernel.org>,
Michael Shavit <mshavit@google.com>,
"Andrea Bolognani" <abologna@redhat.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Peter Xu" <peterx@redhat.com>,
Zhangfei Gao <zhangfei.gao@linaro.org>,
"nathanc@nvidia.com" <nathanc@nvidia.com>,
"arighi@nvidia.com" <arighi@nvidia.com>,
"ianm@nvidia.com" <ianm@nvidia.com>,
"jan@nvidia.com" <jan@nvidia.com>,
"mochs@nvidia.com" <mochs@nvidia.com>
Subject: Re: nested-smmuv3 topic for QEMU/libvirt, Nov 2024
Date: Fri, 1 Nov 2024 12:29:14 -0700 [thread overview]
Message-ID: <ZyUsClNQwcIkjdZo@Asurada-Nvidia> (raw)
In-Reply-To: <cf4359b18f0d44f09b8901141b678a09@huawei.com>
On Fri, Nov 01, 2024 at 06:35:23PM +0000, Shameerali Kolothum Thodi wrote:
> > @Shameer,
> > Do you have some update on the pluggable smmuv3 module?
>
> I have a bare minimum prototype code that works with a pluggable smmuv3.
>
> ...
> -device pxb-pcie,id=pcie.1,bus_nr=2,bus=pcie.0 \
> -device pcie-root-port,id=pcie.port1,bus=pcie.1 \
> -device arm-smmuv3-nested,id=smmuv1,pci-bus=pcie.1 \
> -device vfio-pci-nohotplug,host=0000:75:00.1,bus=pcie.port1,iommufd=iommufd0 \
> -device pxb-pcie,id=pcie.2,bus_nr=8,bus=pcie.0 \
> -device pcie-root-port,id=pcie.port2,bus=pcie.2,chassis=8 \
> -device arm-smmuv3-nested,id=smmuv2,pci-bus=pcie.2 \
> -device vfio-pci-nohotplug,host=0000:7d:02.1,bus=pcie.port2,iommufd=iommufd0 \
> ...
>
> Something like above can now boot a Guest with the latest kernel. But I am not
> sure it actually works correctly. I need a bit more time to update this and carry
> out some tests. Will target that in Nov.
That looks nice to me! Thanks for the update.
> > Updates on my side:
> > 1) I have kept uAPI updated to the latest version and verified too.
> > There should be some polishing changes depending on how the basic
> > nesting infrastructure would look like from Intel/Duan's work.
> > 2) I got some help from NVIDIA folks for the libvirt task. And they
> > have done some drafting and are now verifying the PCI topology
> > with "iommu=none".
> >
> > Once the pluggable smmuv3 module is ready to test, we will make some
> > change to libvirt for that and drop the auto-assigning patches from
> > the VIRT code, so as to converge for a libvirt+QEMU test.
>
> One query I have is, do Qemu still need to check whether the VFIO devices are
> assigned correctly behind the nested vSMMUv3 w.r.t the phys SMMUv3s or not?
> Or we can just trust whatever the user/libvirt specifies?
That's a good point. I assume ideally QEMU should do something,
though that would be somewhat duplicated with libvirt.
> (I think even if we don't explicitly check, at present it will eventually fail in s2
> HWPT attach for the viommu if it belongs to a different phys SMMUv3).
Yes. That's what we have. Perhaps simply print something like:
"is the device assigned to the correct arm-smmuv3-nested/pxb?"
?
Thanks
Nicolin
next prev parent reply other threads:[~2024-11-01 19:30 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-01 4:09 nested-smmuv3 topic for QEMU/libvirt, Nov 2024 Nicolin Chen
2024-11-01 11:55 ` Jason Gunthorpe
2024-12-02 6:04 ` Zhangfei Gao
2024-12-02 8:07 ` Shameerali Kolothum Thodi via
2024-12-02 15:00 ` Zhangfei Gao
2024-11-01 18:35 ` Shameerali Kolothum Thodi via
2024-11-01 19:29 ` Nicolin Chen [this message]
2024-11-08 13:05 ` Shameerali Kolothum Thodi via
2024-11-20 21:13 ` Andrea Bolognani
2024-11-21 9:47 ` Shameerali Kolothum Thodi via
2024-11-07 11:11 ` Eric Auger
2024-11-07 20:31 ` Nicolin Chen
2024-11-07 22:10 ` Donald Dutile
2024-11-18 17:59 ` Eric Auger
2024-11-19 7:07 ` Duan, Zhenzhong
2024-11-19 8:17 ` Eric Auger
2024-11-20 20:44 ` Nicolin Chen
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