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From: Kashyap Chamarthy <kchamart@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: eric.auger@redhat.com, eric.auger.pro@gmail.com,
	cohuck@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org,
	kvmarm@lists.linux.dev, richard.henderson@linaro.org,
	alex.bennee@linaro.org, maz@kernel.org, oliver.upton@linux.dev,
	sebott@redhat.com, shameerali.kolothum.thodi@huawei.com,
	armbru@redhat.com, berrange@redhat.com, abologna@redhat.com,
	jdenemar@redhat.com, shahuang@redhat.com, mark.rutland@arm.com,
	philmd@linaro.org, pbonzini@redhat.com
Subject: Re: [RFC 21/21] arm/cpu-features: Document custom vcpu model
Date: Mon, 4 Nov 2024 19:29:02 +0100	[thread overview]
Message-ID: <ZykSbiUnb_ZclYCz@pinwheel> (raw)
In-Reply-To: <CAFEAcA9y5ooPNZ7JbGmRyTKbZn5XPK+5zZgVAvnER=++kWuBrg@mail.gmail.com>

On Mon, Nov 04, 2024 at 04:30:17PM +0000, Peter Maydell wrote:
> On Mon, 4 Nov 2024 at 15:34, Eric Auger <eric.auger@redhat.com> wrote:

[...]

> > > If possible, it would be really helpful (and user-friendly) to be able
> > > to specify the CPU feature names as you see under /proc/cpuinfo, and be
> > > able to turn the flags on or off:
> > >
> > >         -M virt -cpu franken,rndr=on,ts=on,fhm=off
> > >
> > > (... instead of specifying long system register IDs that groups together
> > > a bunch of CPU features.  If I understand it correctly, the register
> > > "ID_AA64ISAR0_EL1" maps to a set of visible features listed here:
> > > https://docs.kernel.org/arch/arm64/cpu-feature-registers.html)
> > Not all the writable ID regs are visible through the above technique.
> > But indeed I think we converged on the idea to use higher level feature
> > names than ID reg field values.
> > However we need to study the feasibility and mappings between those high
> > level features and ID reg field values.
> > The cons is that we need to describe this mapping manually. Besides
> > being cumbersome this is also error prone.
> 
> You might be interested in "Arm Architecture Features" on
> https://developer.arm.com/Architectures/A-Profile%20Architecture#Downloads
> which includes a 1.8MB Features.json which is a machine
> readable version of the "what are the features and their
> dependencies and ID registers and so on" information.

I just took a quick at the JSON file.  It was a bit difficult to get a
sense of the structure of the file.  Maybe it makes more sense to those
who are more Arm-aware than me.  Or maybe that's what you meant by
"alpha quality" below :)

Out of curiosity, I tried to find the features for the register
"ID_AA64ISAR0_EL1".  I was navigating via trial-and-error with `jq`.
There's a lot of "right"/"left" traversing:

    $> jq '.parameters[136]|.constraints[1]|.right|.left|.value' Features.json 
    "FEAT_TME"

The register name is buried under this:

    $> jq '.parameters[136]|.constraints[1]|.right|.right|.left|.arguments' Features.json 
    [
      {
        "_type": "Types.Field",
        "value": {
          "field": "TME",
          "instance": null,
          "name": "ID_AA64ISAR0_EL1",
          "slices": null,
          "state": "AArch64"
        }
      }
    ]


I was niavely expecting a more predictable structure such as:

    $> jq '.register[ID_AA64ISAR0_EL1]|.fields' Features.json
    FEAT_RNG
    FEAT_TLBIOS
    ...

> But note that (a) it is alpha quality and (b) I am not personally
> going to try to interpret what might be reasonable to do with it
> based on the legal notice attached to it: that's a matter for
> you and your lawyer ;-)

Hmm, it sounds like until point (b) is clarified, this file is out of
consideration from an upstream point of view.

> -- PMM
> 

-- 
/kashyap



  parent reply	other threads:[~2024-11-04 18:30 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-25 10:17 [RFC 00/21] kvm/arm: Introduce a customizable aarch64 KVM host model Eric Auger
2024-10-25 10:17 ` [RFC 01/21] kvm: kvm_get_writable_id_regs Eric Auger
2024-10-25 10:17 ` [RFC 02/21] arm/cpu: Add sysreg definitions in cpu-sysegs.h Eric Auger
2024-10-25 10:17 ` [RFC 03/21] arm/cpu: Store aa64isar0 into the idregs arrays Eric Auger
2024-10-25 10:17 ` [RFC 04/21] arm/cpu: Store aa64isar1/2 into the idregs array Eric Auger
2024-10-25 10:17 ` [RFC 05/21] arm/cpu: Store aa64drf0/1 " Eric Auger
2024-10-25 10:17 ` [RFC 06/21] arm/cpu: Store aa64mmfr0-3 " Eric Auger
2024-10-25 10:17 ` [RFC 07/21] arm/cpu: Store aa64drf0/1 " Eric Auger
2024-10-25 10:17 ` [RFC 08/21] arm/cpu: Store aa64smfr0 " Eric Auger
2024-10-25 10:17 ` [RFC 09/21] arm/cpu: Store id_isar0-7 " Eric Auger
2024-10-25 10:17 ` [RFC 10/21] arm/cpu: Store id_mfr0/1 " Eric Auger
2024-10-25 10:17 ` [RFC 11/21] arm/cpu: Store id_dfr0/1 " Eric Auger
2024-10-25 10:17 ` [RFC 12/21] arm/cpu: Store id_mmfr0-5 " Eric Auger
2024-10-25 10:17 ` [RFC 13/21] arm/cpu: Add infra to handle generated ID register definitions Eric Auger
2024-10-25 12:55   ` Daniel P. Berrangé
2024-10-25 10:17 ` [RFC 14/21] arm/cpu: Add sysreg generation scripts Eric Auger
2024-10-25 17:05   ` Marc Zyngier
2024-11-04 13:33     ` Eric Auger
2024-10-25 10:17 ` [RFC 15/21] arm/cpu: Add generated files Eric Auger
2024-10-25 10:17 ` [RFC 16/21] arm/kvm: Allow reading all the writable ID registers Eric Auger
2024-10-25 10:17 ` [RFC 17/21] arm/kvm: write back modified ID regs to KVM Eric Auger
2024-10-25 10:17 ` [RFC 18/21] arm/cpu: Introduce a customizable kvm host cpu model Eric Auger
2024-10-25 13:06   ` Daniel P. Berrangé
2024-10-25 13:18     ` Eric Auger
2024-10-25 13:23       ` Daniel P. Berrangé
2024-10-28 16:00         ` Cornelia Huck
2024-10-28 16:15           ` Daniel P. Berrangé
2024-10-28 16:16         ` Peter Maydell
2024-10-28 16:25           ` Cornelia Huck
2024-10-28 16:35           ` Daniel P. Berrangé
2024-10-28 16:48             ` Peter Maydell
2024-10-28 16:56               ` Oliver Upton
2024-10-30 16:15                 ` Cornelia Huck
2024-10-30 16:27                   ` Daniel P. Berrangé
2024-11-04 17:09                 ` Eric Auger
2024-11-04 17:16                   ` Peter Maydell
2024-11-04 18:15                     ` Eric Auger
2024-10-28 17:04               ` Daniel P. Berrangé
2024-11-04 14:27                 ` Eric Auger
2024-11-11 14:29                   ` Cornelia Huck
2024-11-12 16:30                     ` Cornelia Huck
2024-11-12 18:28                       ` Eric Auger
2024-11-29 15:10                         ` Cornelia Huck
2024-11-29 15:42                           ` Peter Maydell
2024-11-29 15:51                             ` Cornelia Huck
2024-11-14 15:44                     ` Peter Maydell
2024-10-25 10:17 ` [RFC 19/21] virt: Allow custom vcpu model in arm virt Eric Auger
2024-10-25 10:17 ` [RFC 20/21] arm-qmp-cmds: introspection for custom model Eric Auger
2024-10-25 10:17 ` [RFC 21/21] arm/cpu-features: Document custom vcpu model Eric Auger
2024-10-25 13:13   ` Daniel P. Berrangé
2024-10-25 13:28     ` Eric Auger
2024-10-25 13:31       ` Daniel P. Berrangé
2024-10-28 16:05         ` Cornelia Huck
2024-10-28 16:09           ` Daniel P. Berrangé
2024-10-28 16:29             ` Cornelia Huck
2024-10-31 12:24               ` Kashyap Chamarthy
2024-10-31 12:59                 ` Peter Maydell
2024-11-04 14:45             ` Eric Auger
2024-11-04 14:55               ` Daniel P. Berrangé
2024-11-04 15:10                 ` Cornelia Huck
2024-11-04 15:24                   ` Daniel P. Berrangé
2024-11-04 15:48                     ` Cornelia Huck
2024-10-28 21:17   ` Kashyap Chamarthy
2024-11-04 15:34     ` Eric Auger
2024-11-04 16:30       ` Peter Maydell
2024-11-04 17:07         ` Eric Auger
2024-11-04 18:29         ` Kashyap Chamarthy [this message]
2024-10-25 12:49 ` [RFC 00/21] kvm/arm: Introduce a customizable aarch64 KVM host model Cornelia Huck
2024-10-25 14:51 ` Kashyap Chamarthy
2024-10-28 16:20   ` Cornelia Huck
2024-10-28 16:44     ` Peter Maydell
2024-11-04 15:52   ` Eric Auger

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