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From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Cc: qemu-devel@nongnu.org, "Anton Johansson" <anjo@rev.ng>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Alistair Francis" <alistair@alistair23.me>,
	"Thomas Huth" <thuth@redhat.com>,
	qemu-arm@nongnu.org, devel@lists.libvirt.org,
	"Marc-André Lureau" <marcandre.lureau@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Jason Wang" <jasowang@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>
Subject: Re: [PATCH 01/19] target/microblaze: Rename CPU endianness property as 'little-endian'
Date: Wed, 6 Nov 2024 00:20:44 +0100	[thread overview]
Message-ID: <ZyqoTD6v_ZJW2OKM@zapote> (raw)
In-Reply-To: <3f61b85c-9382-4520-a1ce-5476eb16fb56@linaro.org>

On Tue, Nov 05, 2024 at 11:18:31PM +0000, Philippe Mathieu-Daudé wrote:
> On 5/11/24 23:01, Philippe Mathieu-Daudé wrote:
> > Hi Edgar,
> > 
> > On 5/11/24 23:54, Edgar E. Iglesias wrote:
> > > On Tue, Nov 05, 2024 at 02:04:13PM +0100, Philippe Mathieu-Daudé wrote:
> > > > Rename the 'endian' property as 'little-endian' because the 'ENDI'
> > > > bit is set when the endianness is in little order, and unset in
> > > > big order.
> > > 
> > > Hi Phil,
> > > 
> > > Unfortunately, these properties are not only QEMU internal these got
> > > named
> > > from the bindings Xilinx choose way back in time.
> > > 
> > > This will likely break many of the Xilinx flows with automatic dts to
> > > qemu property conversions so I don't think it's a good idea to rename it.
> > > If you like to clarify things perhaps we could keep an alias for the old
> > > one?
> > 
> > Adding an alias is the safest way, I'll respin this patch.
> > 
> > Note however I'm worried about this fragile disconnect between Xilinx
> > dts conversion which isn't exercised on mainstream (in particular if
> > you get busy and can't review).
> > 
> > > 
> > > For example:
> > > https://github.com/torvalds/linux/blob/master/arch/microblaze/boot/dts/system.dts#L73
> > > 
> > > Cheers,
> > > Edgar
> > > 
> > > 
> > > > 
> > > > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> > > > ---
> > > >   hw/microblaze/petalogix_ml605_mmu.c | 2 +-
> > > >   hw/microblaze/xlnx-zynqmp-pmu.c     | 2 +-
> > > >   target/microblaze/cpu.c             | 2 +-
> > > >   3 files changed, 3 insertions(+), 3 deletions(-)
> 
> 
> > > > diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
> > > > index 135947ee800..e9f98806274 100644
> > > > --- a/target/microblaze/cpu.c
> > > > +++ b/target/microblaze/cpu.c
> > > > @@ -368,7 +368,7 @@ static Property mb_properties[] = {
> > > >       DEFINE_PROP_UINT8("use-non-secure", MicroBlazeCPU,
> > > > cfg.use_non_secure, 0),
> > > >       DEFINE_PROP_BOOL("dcache-writeback", MicroBlazeCPU,
> > > > cfg.dcache_writeback,
> > > >                        false),
> > > > -    DEFINE_PROP_BOOL("endianness", MicroBlazeCPU, cfg.endi, false),
> > > > +    DEFINE_PROP_BOOL("little-endian", MicroBlazeCPU, cfg.endi, false),
> > > >       /* Enables bus exceptions on failed data accesses
> > > > (load/stores).  */
> > > >       DEFINE_PROP_BOOL("dopb-bus-exception", MicroBlazeCPU,
> > > >                        cfg.dopb_bus_exception, false),
> > > > -- 
> 
> OK if I squash the following?


Looks good!
Thanks!

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>




> 
> -- >8 --
> diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
> index e9f98806274..b322f060777 100644
> --- a/target/microblaze/cpu.c
> +++ b/target/microblaze/cpu.c
> @@ -328,9 +328,16 @@ static void mb_cpu_initfn(Object *obj)
>      qdev_init_gpio_in_named(DEVICE(cpu), mb_cpu_ns_axi_dc, "ns_axi_dc", 1);
>      qdev_init_gpio_in_named(DEVICE(cpu), mb_cpu_ns_axi_ic, "ns_axi_ic", 1);
>  #endif
> +
> +    /* Restricted 'endianness' property is equivalent of 'little-endian' */
> +    object_property_add_alias(obj, "little-endian", obj, "endianness");
>  }
> 
>  static Property mb_properties[] = {
> +    /*
> +     * Following properties are used by Xilinx DTS conversion tool
> +     * do not rename them.
> +     */
>      DEFINE_PROP_UINT32("base-vectors", MicroBlazeCPU, cfg.base_vectors, 0),
>      DEFINE_PROP_BOOL("use-stack-protection", MicroBlazeCPU, cfg.stackprot,
>                       false),
> @@ -368,7 +375,7 @@ static Property mb_properties[] = {
>      DEFINE_PROP_UINT8("use-non-secure", MicroBlazeCPU, cfg.use_non_secure,
> 0),
>      DEFINE_PROP_BOOL("dcache-writeback", MicroBlazeCPU,
> cfg.dcache_writeback,
>                       false),
> -    DEFINE_PROP_BOOL("little-endian", MicroBlazeCPU, cfg.endi, false),
> +    DEFINE_PROP_BOOL("endianness", MicroBlazeCPU, cfg.endi, false),
>      /* Enables bus exceptions on failed data accesses (load/stores).  */
>      DEFINE_PROP_BOOL("dopb-bus-exception", MicroBlazeCPU,
>                       cfg.dopb_bus_exception, false),
> @@ -387,6 +394,9 @@ static Property mb_properties[] = {
>      DEFINE_PROP_UINT8("pvr", MicroBlazeCPU, cfg.pvr, C_PVR_FULL),
>      DEFINE_PROP_UINT8("pvr-user1", MicroBlazeCPU, cfg.pvr_user1, 0),
>      DEFINE_PROP_UINT32("pvr-user2", MicroBlazeCPU, cfg.pvr_user2, 0),
> +    /*
> +     * End of properties reserved by Xilinx DTS conversion tool.
> +     */
>      DEFINE_PROP_END_OF_LIST(),
>  };
> 
> ---


  reply	other threads:[~2024-11-05 23:21 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-05 13:04 [PATCH 00/19] hw/microblaze: Allow running cross-endian vCPUs Philippe Mathieu-Daudé
2024-11-05 13:04 ` [PATCH 01/19] target/microblaze: Rename CPU endianness property as 'little-endian' Philippe Mathieu-Daudé
2024-11-05 14:16   ` Anton Johansson via
2024-11-05 22:29   ` Alistair Francis
2024-11-05 22:54   ` Edgar E. Iglesias
2024-11-05 23:01     ` Philippe Mathieu-Daudé
2024-11-05 23:18       ` Philippe Mathieu-Daudé
2024-11-05 23:20         ` Edgar E. Iglesias [this message]
2024-11-05 13:04 ` [PATCH 02/19] hw/microblaze: Deprecate big-endian petalogix-ml605 & xlnx-zynqmp-pmu Philippe Mathieu-Daudé
2024-11-05 14:22   ` Anton Johansson via
2024-11-05 22:34   ` Alistair Francis
2024-11-05 22:56   ` Edgar E. Iglesias
2024-11-05 13:04 ` [PATCH 03/19] hw/microblaze/s3adsp1800: Explicit CPU endianness Philippe Mathieu-Daudé
2024-11-05 13:22   ` Richard Henderson
2024-11-05 22:34   ` Alistair Francis
2024-11-05 22:59   ` Edgar E. Iglesias
2024-11-05 13:04 ` [PATCH 04/19] hw/microblaze/s3adsp1800: Rename unimplemented MMIO region as xps_gpio Philippe Mathieu-Daudé
2024-11-05 14:26   ` Anton Johansson via
2024-11-05 22:37   ` Alistair Francis
2024-11-05 22:59   ` Edgar E. Iglesias
2024-11-05 13:04 ` [PATCH 05/19] hw/microblaze/s3adsp1800: Declare machine type using DEFINE_TYPES macro Philippe Mathieu-Daudé
2024-11-05 14:33   ` Anton Johansson via
2024-11-05 22:40   ` Alistair Francis
2024-11-05 22:59   ` Edgar E. Iglesias
2024-11-05 13:04 ` [PATCH 06/19] hw/microblaze: Fix MemoryRegionOps coding style Philippe Mathieu-Daudé
2024-11-05 13:23   ` Richard Henderson
2024-11-05 22:38   ` Alistair Francis
2024-11-05 23:00   ` Edgar E. Iglesias
2024-11-05 13:04 ` [PATCH 07/19] hw/microblaze: Restrict MemoryRegionOps are implemented as 32-bit Philippe Mathieu-Daudé
2024-11-05 14:50   ` Anton Johansson via
2024-11-05 22:24   ` Philippe Mathieu-Daudé
2024-11-05 22:27     ` Philippe Mathieu-Daudé
2025-01-02 12:20       ` Philippe Mathieu-Daudé
2024-11-05 13:04 ` [PATCH 08/19] hw/microblaze: Propagate CPU endianness to microblaze_load_kernel() Philippe Mathieu-Daudé
2024-11-05 16:56   ` Anton Johansson via
2024-11-05 22:13   ` Alistair Francis
2024-11-05 23:02   ` Edgar E. Iglesias
2024-11-05 13:04 ` [PATCH 09/19] hw/intc/xilinx_intc: Only expect big-endian accesses Philippe Mathieu-Daudé
2024-11-05 16:58   ` Anton Johansson via
2024-11-05 22:24   ` Alistair Francis
2024-11-05 23:08   ` Edgar E. Iglesias
2024-11-14 22:43     ` Philippe Mathieu-Daudé
2024-11-15 15:00       ` Michal Simek
2024-11-05 13:04 ` [PATCH 10/19] hw/timer/xilinx_timer: " Philippe Mathieu-Daudé
2024-11-05 16:58   ` Anton Johansson via
2024-11-05 23:09   ` Edgar E. Iglesias
2024-11-05 13:04 ` [PATCH 11/19] hw/timer/xilinx_timer: Allow down to 8-bit memory access Philippe Mathieu-Daudé
2024-11-05 17:00   ` Anton Johansson via
2024-11-05 22:25   ` Alistair Francis
2024-11-05 23:09   ` Edgar E. Iglesias
2024-11-05 13:04 ` [PATCH 12/19] hw/net/xilinx_ethlite: Only expect big-endian accesses Philippe Mathieu-Daudé
2024-11-05 13:30   ` Richard Henderson
2024-11-06  9:53     ` Philippe Mathieu-Daudé
2024-11-05 14:18   ` Paolo Bonzini
2024-11-05 23:29     ` Philippe Mathieu-Daudé
2024-11-06  6:45       ` Paolo Bonzini
2024-11-05 23:16   ` Edgar E. Iglesias
2024-11-05 13:04 ` [PATCH 13/19] target/microblaze: Explode MO_TExx -> MO_TE | MO_xx Philippe Mathieu-Daudé
2024-11-05 13:31   ` Richard Henderson
2024-11-05 22:57   ` Alistair Francis
2024-11-05 13:04 ` [PATCH 14/19] target/microblaze: Set MO_TE once in do_load() / do_store() Philippe Mathieu-Daudé
2024-11-05 13:32   ` Richard Henderson
2024-11-05 13:04 ` [PATCH 15/19] target/microblaze: Introduce mo_endian() helper Philippe Mathieu-Daudé
2024-11-05 13:32   ` Richard Henderson
2024-11-05 13:04 ` [PATCH 16/19] target/microblaze: Consider endianness while translating code Philippe Mathieu-Daudé
2024-11-05 13:33   ` Richard Henderson
2024-11-05 13:04 ` [PATCH 17/19] hw/microblaze: Support various endianness for s3adsp1800 machines Philippe Mathieu-Daudé
2024-11-05 13:43   ` Richard Henderson
2024-11-05 13:04 ` [PATCH 18/19] tests/functional: Explicit endianness of microblaze assets Philippe Mathieu-Daudé
2024-11-05 13:44   ` Richard Henderson
2024-11-05 13:04 ` [PATCH 19/19] tests/functional: Add microblaze cross-endianness tests Philippe Mathieu-Daudé
2024-11-05 13:46   ` Richard Henderson

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