From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Cc: qemu-devel@nongnu.org,
"Richard Henderson" <richard.henderson@linaro.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Anton Johansson" <anjo@rev.ng>,
"Jason Wang" <jasowang@redhat.com>,
qemu-arm@nongnu.org,
"Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Thomas Huth" <thuth@redhat.com>,
"Alistair Francis" <alistair@alistair23.me>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Gustavo Romero" <gustavo.romero@linaro.org>
Subject: Re: [PATCH 09/20] hw/net/xilinx_ethlite: Introduce txbuf_ptr() helper
Date: Wed, 13 Nov 2024 16:26:25 +0100 [thread overview]
Message-ID: <ZzTFIV9ZS-HFwIUP@zapote> (raw)
In-Reply-To: <20241112181044.92193-10-philmd@linaro.org>
On Tue, Nov 12, 2024 at 07:10:33PM +0100, Philippe Mathieu-Daudé wrote:
> txbuf_ptr() points to the beginning of a (RAM) TX buffer
> within the device state.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
> ---
> hw/net/xilinx_ethlite.c | 13 ++++++++++---
> 1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c
> index fe91891310..d4882f43f7 100644
> --- a/hw/net/xilinx_ethlite.c
> +++ b/hw/net/xilinx_ethlite.c
> @@ -87,12 +87,18 @@ static inline void eth_pulse_irq(XlnxXpsEthLite *s)
> }
> }
>
> -__attribute__((unused))
> static unsigned addr_to_port_index(hwaddr addr)
> {
> return extract64(addr, 11, 1);
> }
>
> +static void *txbuf_ptr(XlnxXpsEthLite *s, unsigned port_index)
> +{
> + unsigned int rxbase = port_index * (0x800 / 4);
> +
> + return &s->regs[rxbase + R_TX_BUF0];
> +}
> +
> static uint64_t
> eth_read(void *opaque, hwaddr addr, unsigned int size)
> {
> @@ -125,6 +131,7 @@ eth_write(void *opaque, hwaddr addr,
> uint64_t val64, unsigned int size)
> {
> XlnxXpsEthLite *s = opaque;
> + unsigned int port_index = addr_to_port_index(addr);
> unsigned int base = 0;
> uint32_t value = val64;
>
> @@ -138,12 +145,12 @@ eth_write(void *opaque, hwaddr addr,
>
> if ((value & (CTRL_P | CTRL_S)) == CTRL_S) {
> qemu_send_packet(qemu_get_queue(s->nic),
> - (void *) &s->regs[base],
> + txbuf_ptr(s, port_index),
> s->regs[base + R_TX_LEN0]);
> if (s->regs[base + R_TX_CTRL0] & CTRL_I)
> eth_pulse_irq(s);
> } else if ((value & (CTRL_P | CTRL_S)) == (CTRL_P | CTRL_S)) {
> - memcpy(&s->conf.macaddr.a[0], &s->regs[base], 6);
> + memcpy(&s->conf.macaddr.a[0], txbuf_ptr(s, port_index), 6);
> if (s->regs[base + R_TX_CTRL0] & CTRL_I)
> eth_pulse_irq(s);
> }
> --
> 2.45.2
>
next prev parent reply other threads:[~2024-11-13 15:27 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-12 18:10 [PATCH 00/20] hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls Philippe Mathieu-Daudé
2024-11-12 18:10 ` [PATCH 01/20] hw/microblaze: Restrict MemoryRegionOps are implemented as 32-bit Philippe Mathieu-Daudé
2024-11-12 18:10 ` [PATCH 02/20] hw/net/xilinx_ethlite: Convert some debug logs to trace events Philippe Mathieu-Daudé
2024-11-13 15:11 ` Edgar E. Iglesias
2024-11-12 18:10 ` [PATCH 03/20] hw/net/xilinx_ethlite: Remove unuseful debug logs Philippe Mathieu-Daudé
2024-11-13 15:11 ` Edgar E. Iglesias
2024-11-12 18:10 ` [PATCH 04/20] hw/net/xilinx_ethlite: Update QOM style Philippe Mathieu-Daudé
2024-11-13 15:12 ` Edgar E. Iglesias
2024-11-12 18:10 ` [PATCH 05/20] hw/net/xilinx_ethlite: Correct maximum RX buffer size Philippe Mathieu-Daudé
2024-11-13 15:15 ` Edgar E. Iglesias
2024-11-12 18:10 ` [PATCH 06/20] hw/net/xilinx_ethlite: Map MDIO registers (as unimplemented) Philippe Mathieu-Daudé
2024-11-13 15:16 ` Edgar E. Iglesias
2024-11-12 18:10 ` [PATCH 07/20] hw/net/xilinx_ethlite: Rename rxbuf -> port_index Philippe Mathieu-Daudé
2024-11-13 15:20 ` Edgar E. Iglesias
2024-11-12 18:10 ` [PATCH 08/20] hw/net/xilinx_ethlite: Add addr_to_port_index() helper Philippe Mathieu-Daudé
2024-11-13 15:23 ` Edgar E. Iglesias
2024-11-14 19:04 ` Philippe Mathieu-Daudé
2024-11-12 18:10 ` [PATCH 09/20] hw/net/xilinx_ethlite: Introduce txbuf_ptr() helper Philippe Mathieu-Daudé
2024-11-13 15:26 ` Edgar E. Iglesias [this message]
2024-11-12 18:10 ` [PATCH 10/20] hw/net/xilinx_ethlite: Introduce rxbuf_ptr() helper Philippe Mathieu-Daudé
2024-11-13 15:26 ` Edgar E. Iglesias
2024-11-12 18:10 ` [PATCH 11/20] hw/net/xilinx_ethlite: Access RX_CTRL register for each port Philippe Mathieu-Daudé
2024-11-13 15:27 ` Edgar E. Iglesias
2024-11-12 18:10 ` [PATCH 12/20] hw/net/xilinx_ethlite: Access TX_GIE " Philippe Mathieu-Daudé
2024-11-13 15:28 ` Edgar E. Iglesias
2024-11-12 18:10 ` [PATCH 13/20] hw/net/xilinx_ethlite: Access TX_LEN " Philippe Mathieu-Daudé
2024-11-13 15:28 ` Edgar E. Iglesias
2024-11-12 18:10 ` [PATCH 14/20] hw/net/xilinx_ethlite: Access TX_CTRL " Philippe Mathieu-Daudé
2024-11-13 15:28 ` Edgar E. Iglesias
2024-11-12 18:10 ` [PATCH 15/20] hw/net/xilinx_ethlite: Map RX_CTRL as MMIO Philippe Mathieu-Daudé
2024-11-13 15:29 ` Edgar E. Iglesias
2024-11-12 18:10 ` [PATCH 16/20] hw/net/xilinx_ethlite: Map TX_LEN " Philippe Mathieu-Daudé
2024-11-13 15:30 ` Edgar E. Iglesias
2024-11-12 18:10 ` [PATCH 17/20] hw/net/xilinx_ethlite: Map TX_GIE " Philippe Mathieu-Daudé
2024-11-13 15:34 ` Edgar E. Iglesias
2024-11-12 18:10 ` [PATCH 18/20] hw/net/xilinx_ethlite: Map TX_CTRL " Philippe Mathieu-Daudé
2024-11-13 15:34 ` Edgar E. Iglesias
2024-11-12 18:10 ` [PATCH 19/20] hw/net/xilinx_ethlite: Map the RAM buffer as RAM memory region Philippe Mathieu-Daudé
2024-11-13 15:35 ` Edgar E. Iglesias
2024-11-13 18:21 ` Paolo Bonzini
2024-11-13 19:37 ` Philippe Mathieu-Daudé
2024-11-12 18:10 ` [PATCH 20/20] hw/net/xilinx_ethlite: Rename 'mmio' MR as 'container' Philippe Mathieu-Daudé
2024-11-13 15:35 ` Edgar E. Iglesias
2024-11-13 15:36 ` [PATCH 00/20] hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls Edgar E. Iglesias
2024-11-14 18:55 ` Philippe Mathieu-Daudé
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