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[213.67.3.247]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-53da077c4a6sm232553e87.140.2024.11.13.07.27.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 07:27:38 -0800 (PST) Date: Wed, 13 Nov 2024 16:27:38 +0100 From: "Edgar E. Iglesias" To: Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= Cc: qemu-devel@nongnu.org, Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?iso-8859-1?Q?Marc-Andr=E9?= Lureau , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero Subject: Re: [PATCH 11/20] hw/net/xilinx_ethlite: Access RX_CTRL register for each port Message-ID: References: <20241112181044.92193-1-philmd@linaro.org> <20241112181044.92193-12-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20241112181044.92193-12-philmd@linaro.org> User-Agent: Mutt/2.2.12 (2023-09-09) Received-SPF: pass client-ip=2a00:1450:4864:20::134; envelope-from=edgar.iglesias@gmail.com; helo=mail-lf1-x134.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Tue, Nov 12, 2024 at 07:10:35PM +0100, Philippe Mathieu-Daudé wrote: > Rather than accessing the registers within the mixed RAM/MMIO > region as indexed register, declare a per-port RX_CTRL. This > will help to map the RAM as RAM (keeping MMIO as MMIO) in few > commits. > > Previous s->regs[R_RX_CTRL0] and s->regs[R_RX_CTRL1] are now > unused. Not a concern, this array will soon disappear. Reviewed-by: Edgar E. Iglesias > > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/net/xilinx_ethlite.c | 31 +++++++++++++++++++++---------- > 1 file changed, 21 insertions(+), 10 deletions(-) > > diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c > index fdbf25fd91..605451a522 100644 > --- a/hw/net/xilinx_ethlite.c > +++ b/hw/net/xilinx_ethlite.c > @@ -59,6 +59,13 @@ > #define CTRL_P 0x2 > #define CTRL_S 0x1 > > +typedef struct XlnxXpsEthLitePort > +{ > + struct { > + uint32_t rx_ctrl; > + } reg; > +} XlnxXpsEthLitePort; > + > #define TYPE_XILINX_ETHLITE "xlnx.xps-ethernetlite" > OBJECT_DECLARE_SIMPLE_TYPE(XlnxXpsEthLite, XILINX_ETHLITE) > > @@ -76,6 +83,7 @@ struct XlnxXpsEthLite > unsigned int port_index; > > UnimplementedDeviceState mdio; > + XlnxXpsEthLitePort port[2]; > uint32_t regs[R_MAX]; > }; > > @@ -110,6 +118,7 @@ static uint64_t > eth_read(void *opaque, hwaddr addr, unsigned int size) > { > XlnxXpsEthLite *s = opaque; > + unsigned port_index = addr_to_port_index(addr); > uint32_t r = 0; > > addr >>= 2; > @@ -121,11 +130,13 @@ eth_read(void *opaque, hwaddr addr, unsigned int size) > case R_TX_LEN1: > case R_TX_CTRL1: > case R_TX_CTRL0: > - case R_RX_CTRL1: > - case R_RX_CTRL0: > r = s->regs[addr]; > break; > > + case R_RX_CTRL1: > + case R_RX_CTRL0: > + r = s->port[port_index].reg.rx_ctrl; > + > default: > r = tswap32(s->regs[addr]); > break; > @@ -173,7 +184,9 @@ eth_write(void *opaque, hwaddr addr, > if (!(value & CTRL_S)) { > qemu_flush_queued_packets(qemu_get_queue(s->nic)); > } > - /* fall through */ > + s->port[port_index].reg.rx_ctrl = value; > + break; > + > case R_TX_LEN0: > case R_TX_LEN1: > case R_TX_GIE0: > @@ -203,23 +216,21 @@ static const MemoryRegionOps eth_ops = { > static bool eth_can_rx(NetClientState *nc) > { > XlnxXpsEthLite *s = qemu_get_nic_opaque(nc); > - unsigned int rxbase = s->port_index * (0x800 / 4); > > - return !(s->regs[rxbase + R_RX_CTRL0] & CTRL_S); > + return !(s->port[s->port_index].reg.rx_ctrl & CTRL_S); > } > > static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size) > { > XlnxXpsEthLite *s = qemu_get_nic_opaque(nc); > unsigned int port_index = s->port_index; > - unsigned int rxbase = port_index * (0x800 / 4); > > /* DA filter. */ > if (!(buf[0] & 0x80) && memcmp(&s->conf.macaddr.a[0], buf, 6)) > return size; > > - if (s->regs[rxbase + R_RX_CTRL0] & CTRL_S) { > - trace_ethlite_pkt_lost(s->regs[R_RX_CTRL0]); > + if (s->port[port_index].reg.rx_ctrl & CTRL_S) { > + trace_ethlite_pkt_lost(s->port[port_index].reg.rx_ctrl); > return -1; > } > > @@ -229,8 +240,8 @@ static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size) > } > memcpy(rxbuf_ptr(s, port_index), buf, size); > > - s->regs[rxbase + R_RX_CTRL0] |= CTRL_S; > - if (s->regs[R_RX_CTRL0] & CTRL_I) { > + s->port[port_index].reg.rx_ctrl |= CTRL_S; > + if (s->port[port_index].reg.rx_ctrl & CTRL_I) { > eth_pulse_irq(s); > } > > -- > 2.45.2 >