From: David Hildenbrand <david@redhat.com>
To: Aurelien Jarno <aurelien@aurel32.net>
Cc: Richard Henderson <rth@twiddle.net>, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 2/5] target/s390x: Enforce instruction features
Date: Thu, 15 Jun 2017 15:10:57 +0200 [thread overview]
Message-ID: <a01099f8-9d81-6dbc-0985-d177da0ff61a@redhat.com> (raw)
In-Reply-To: <20170615125312.nlzx37tfduoakceg@aurel32.net>
>> A "sane" guest (e.g. Linux) will only use an instruction if the
>> corresponding stfl(e) bit is set. So in my opinion, this should be just
>> fine. If the bit is not set currently, the guest will not use it == dead
>> code.
>
> Not necessarily. Depending on the distribution, gcc and hence binaries
> default to a different ISA. Over the time people have added the
> corresponding instructions to QEMU so that these binaries work. Now
> given that GCC does not necessarily use all the instructions from a
> given facility, we end up with missing instructions.
That's true, glibc sometimes assumes a certain architecture level
without checking. So you're right, maybe we should defer this "big
hammer" change until we have all facilities as part of the qemu CPU
model. Then, e.g. runnning -cpu qemu will not break such stuff, however
e.g. -cpu z900 could correctly simulate that architecture level.
One option would be:
/* for now, we don't fake absence of features for the qemu model */
if (!object_dynamic_cast(cpu, "qemu-s390x-cpu") {
dc.features = cpu->model->features;
}
...
if (s->features && !test_bit(insn->fac, s->features)) {
gen_program_exception(s, PGM_OPERATION);
return EXIT_NORETURN;
}
>
> Taking this to its logical extreme, given we don't fully implement the Z
> facility (for example the HFP instructions are missing), we should
> prevent all the programs to run until that is fixed.
I think we don't even implement the PLO, so we're not even pre-z complete ;)
--
Thanks,
David
next prev parent reply other threads:[~2017-06-15 13:11 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-15 5:53 [Qemu-devel] [PATCH 0/5] More s390x improvements Richard Henderson
2017-06-15 5:53 ` [Qemu-devel] [PATCH 1/5] target/s390x: Map existing FAC_* names to S390_FEAT_* names Richard Henderson
2017-06-15 5:53 ` [Qemu-devel] [PATCH 2/5] target/s390x: Enforce instruction features Richard Henderson
2017-06-15 7:01 ` Aurelien Jarno
2017-06-15 11:28 ` David Hildenbrand
2017-06-15 12:53 ` Aurelien Jarno
2017-06-15 13:10 ` David Hildenbrand [this message]
2017-06-15 20:55 ` Aurelien Jarno
2017-06-15 5:53 ` [Qemu-devel] [PATCH 3/5] target/s390x: change PSW_SHIFT_KEY Richard Henderson
2017-06-15 5:53 ` [Qemu-devel] [PATCH 4/5] target/s390x: implement mvcos instruction Richard Henderson
2017-06-15 5:53 ` [Qemu-devel] [PATCH 5/5] target/s390x: mark CSST, CSST2, FPSEH facilities as available Richard Henderson
2017-06-15 9:02 ` Thomas Huth
2017-06-15 15:55 ` Richard Henderson
2017-06-15 20:49 ` Aurelien Jarno
2017-06-15 21:10 ` Richard Henderson
2017-06-15 21:19 ` Aurelien Jarno
2017-06-15 7:51 ` [Qemu-devel] [PATCH 0/5] More s390x improvements no-reply
2017-06-15 7:59 ` no-reply
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