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[88.21.205.111]) by smtp.gmail.com with ESMTPSA id d13sm5323231ejc.44.2020.12.05.08.33.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 05 Dec 2020 08:33:05 -0800 (PST) Subject: Re: [RFC v8 15/27] cpu: Introduce TCGCpuOperations struct To: Claudio Fontana , Paolo Bonzini , Thomas Huth , Richard Henderson , Stefano Stabellini , Wenchao Wang , Roman Bolshakov , Sunil Muthuswamy References: <20201205161518.14365-1-cfontana@suse.de> <20201205161518.14365-16-cfontana@suse.de> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: Date: Sat, 5 Dec 2020 17:33:03 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.4.0 MIME-Version: 1.0 In-Reply-To: <20201205161518.14365-16-cfontana@suse.de> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=63.128.21.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Eduardo Habkost , Paul Durrant , Jason Wang , Marcelo Tosatti , qemu-devel@nongnu.org, Peter Xu , Dario Faggioli , Cameron Esfahani , haxm-team@intel.com, Colin Xu , Anthony Perard , Bruce Rogers , Olaf Hering , "Emilio G . Cota" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 12/5/20 5:15 PM, Claudio Fontana wrote: > From: Eduardo Habkost > > The TCG-specific CPU methods will be moved to a separate struct, > to make it easier to move accel-specific code outside generic CPU > code in the future. Start by moving tcg_initialize(). > > The new CPUClass.tcg_opts field may eventually become a pointer, > but keep it an embedded struct for now, to make code conversion > easier. > > Signed-off-by: Eduardo Habkost > > [claudio: make the tcg code build for CONFIG_TCG only] > > Signed-off-by: Claudio Fontana > Reviewed-by: Philippe Mathieu-Daudé > --- > MAINTAINERS | 1 + > cpu.c | 6 +++++- > include/hw/core/cpu.h | 9 ++++++++- > include/hw/core/tcg-cpu-ops.h | 25 +++++++++++++++++++++++++ > target/alpha/cpu.c | 2 +- > target/arm/cpu.c | 2 +- > target/avr/cpu.c | 2 +- > target/cris/cpu.c | 12 ++++++------ > target/hppa/cpu.c | 2 +- > target/i386/tcg-cpu.c | 2 +- > target/lm32/cpu.c | 2 +- > target/m68k/cpu.c | 2 +- > target/microblaze/cpu.c | 2 +- > target/mips/cpu.c | 2 +- > target/moxie/cpu.c | 2 +- > target/nios2/cpu.c | 2 +- > target/openrisc/cpu.c | 2 +- > target/ppc/translate_init.c.inc | 2 +- > target/riscv/cpu.c | 2 +- > target/rx/cpu.c | 2 +- > target/s390x/cpu.c | 2 +- > target/sh4/cpu.c | 2 +- > target/sparc/cpu.c | 2 +- > target/tilegx/cpu.c | 2 +- > target/tricore/cpu.c | 2 +- > target/unicore32/cpu.c | 2 +- > target/xtensa/cpu.c | 2 +- > 27 files changed, 67 insertions(+), 30 deletions(-) > create mode 100644 include/hw/core/tcg-cpu-ops.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index f53f2678d8..d876f504a6 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -1535,6 +1535,7 @@ F: qapi/machine.json > F: qapi/machine-target.json > F: include/hw/boards.h > F: include/hw/core/cpu.h > +F: include/hw/core/tcg-cpu-ops.h > F: include/hw/cpu/cluster.h > F: include/sysemu/numa.h > T: git https://github.com/ehabkost/qemu.git machine-next > diff --git a/cpu.c b/cpu.c > index 0be5dcb6f3..27ad096cc4 100644 > --- a/cpu.c > +++ b/cpu.c > @@ -174,14 +174,18 @@ void cpu_exec_initfn(CPUState *cpu) > void cpu_exec_realizefn(CPUState *cpu, Error **errp) > { > CPUClass *cc = CPU_GET_CLASS(cpu); > +#ifdef CONFIG_TCG > static bool tcg_target_initialized; > +#endif /* CONFIG_TCG */ Maybe worth extract as tcg_target_initialized() method. > > cpu_list_add(cpu); > > +#ifdef CONFIG_TCG > if (tcg_enabled() && !tcg_target_initialized) { > tcg_target_initialized = true; > - cc->tcg_initialize(); > + cc->tcg_ops.initialize(); > } > +#endif /* CONFIG_TCG */ > tlb_init(cpu); [...]