From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: "Jamin Lin" <jamin_lin@aspeedtech.com>,
"Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>, "Bin Meng" <bmeng.cn@gmail.com>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>,
"open list:SD (Secure Card)" <qemu-block@nongnu.org>
Cc: troy_lee@aspeedtech.com, yunlin.tang@aspeedtech.com,
"Cédric Le Goater" <clg@redhat.com>
Subject: Re: [PATCH v3 2/3] hw/sd/sdhci: Introduce a new Write Protected pin inverted property
Date: Tue, 7 Jan 2025 20:29:09 +0100 [thread overview]
Message-ID: <a0fd5f28-42e9-43dc-9b0d-d4022fe51cee@linaro.org> (raw)
In-Reply-To: <20241114094839.4128404-3-jamin_lin@aspeedtech.com>
On 14/11/24 10:48, Jamin Lin wrote:
> The Write Protect pin of SDHCI model is default active low to match the SDHCI
> spec. So, write enable the bit 19 should be 1 and write protected the bit 19
> should be 0 at the Present State Register (0x24). However, some boards are
> design Write Protected pin active high. In other words, write enable the bit 19
> should be 0 and write protected the bit 19 should be 1 at the
> Present State Register (0x24). To support it, introduces a new "wp-inverted"
> property and set it false by default.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> Acked-by: Cédric Le Goater <clg@redhat.com>
> ---
> hw/sd/sdhci.c | 6 ++++++
> include/hw/sd/sdhci.h | 5 +++++
> 2 files changed, 11 insertions(+)
Acked-by: Philippe Mathieu-Daudé <philmd@linaro.org>
next prev parent reply other threads:[~2025-01-07 19:29 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-14 9:48 [PATCH v3 0/3] Introduce a new Write Protected pin inverted property Jamin Lin via
2024-11-14 9:48 ` [PATCH v3 1/3] hw/sd/sdhci: Fix coding style Jamin Lin via
2025-01-07 19:28 ` Philippe Mathieu-Daudé
2024-11-14 9:48 ` [PATCH v3 2/3] hw/sd/sdhci: Introduce a new Write Protected pin inverted property Jamin Lin via
2025-01-07 19:29 ` Philippe Mathieu-Daudé [this message]
2025-01-21 10:38 ` Cédric Le Goater
2025-01-22 2:04 ` Jamin Lin
2024-11-14 9:48 ` [PATCH v3 3/3] hw/arm/aspeed: Invert sdhci write protected pin for AST2600 EVB Jamin Lin via
2025-01-07 19:29 ` Philippe Mathieu-Daudé
2024-11-27 9:44 ` [PATCH v3 0/3] Introduce a new Write Protected pin inverted property Cédric Le Goater
2024-11-27 11:23 ` Philippe Mathieu-Daudé
2024-11-27 11:26 ` Cédric Le Goater
2024-11-28 11:06 ` Peter Maydell
2025-01-07 17:54 ` Cédric Le Goater
2025-01-07 22:36 ` Peter Maydell
2025-01-08 9:11 ` Cédric Le Goater
2024-11-28 5:37 ` Jamin Lin
2025-01-07 18:16 ` Cédric Le Goater
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