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[81.36.146.213]) by smtp.gmail.com with ESMTPSA id c77sm634227wme.48.2021.10.11.15.07.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 11 Oct 2021 15:07:01 -0700 (PDT) Message-ID: Date: Tue, 12 Oct 2021 00:06:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.1.0 Subject: Re: [PATCH 4/8] accel/tcg: Add guest_base_signed_addr32 for user-only Content-Language: en-US To: Richard Henderson , qemu-devel@nongnu.org References: <20211010174401.141339-1-richard.henderson@linaro.org> <20211010174401.141339-5-richard.henderson@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: <20211010174401.141339-5-richard.henderson@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x433.google.com X-Spam_score_int: -9 X-Spam_score: -1.0 X-Spam_bar: - X-Spam_report: (-1.0 / 5.0 requ) BAYES_00=-1.9, CTE_8BIT_MISMATCH=0.452, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: git@xen0n.name, Alistair.Francis@wdc.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 10/10/21 19:43, Richard Henderson wrote: > While the host may prefer to treat 32-bit addresses as signed, > there are edge cases of guests that cannot be implemented with > addresses 0x7fff_ffff and 0x8000_0000 being non-consecutive. > > Therefore, default to guest_base_signed_addr32 false, and allow > probe_guest_base to determine whether it is possible to set it > to true. A tcg backend which sets TCG_TARGET_SIGNED_ADDR32 will > have to cope with either setting for user-only. > > Signed-off-by: Richard Henderson > --- > include/exec/cpu-all.h | 16 ++++++++++++++++ > include/exec/cpu_ldst.h | 3 ++- > bsd-user/main.c | 4 ++++ > linux-user/main.c | 3 +++ > 4 files changed, 25 insertions(+), 1 deletion(-) > > diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h > index 32cfb634c6..80b5e17329 100644 > --- a/include/exec/cpu-all.h > +++ b/include/exec/cpu-all.h > @@ -146,6 +146,7 @@ static inline void tswap64s(uint64_t *s) > > #if defined(CONFIG_USER_ONLY) > #include "exec/user/abitypes.h" > +#include "tcg-target-sa32.h" Unrelated but this header could be simplified by moving this block to a new header such "exec/user/address.h". > > /* On some host systems the guest address space is reserved on the host. > * This allows the guest address space to be offset to a convenient location. > @@ -154,6 +155,21 @@ extern uintptr_t guest_base; > extern bool have_guest_base; > extern unsigned long reserved_va; > > +#if TCG_TARGET_SIGNED_ADDR32 && TARGET_LONG_BITS == 32 > +extern bool guest_base_signed_addr32; > +#else > +#define guest_base_signed_addr32 false > +#endif > + > +static inline void set_guest_base_signed_addr32(void) > +{ > +#ifdef guest_base_signed_addr32 > + qemu_build_not_reached(); > +#else > + guest_base_signed_addr32 = true; > +#endif > +} > + > /* > * Limit the guest addresses as best we can. > * Reviewed-by: Philippe Mathieu-Daudé