From: Alexey Kardashevskiy <aik@ozlabs.ru>
To: Fabiano Rosas <farosas@linux.ibm.com>, qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, philmd@redhat.com, pbonzini@redhat.com,
crosthwaite.peter@gmail.com, rth@twiddle.net,
david@gibson.dropbear.id.au, cohuck@redhat.com
Subject: Re: [Qemu-devel] [RFC PATCH v3 2/7] target/ppc: Add ppc_get_trace_int_handler_addr
Date: Fri, 1 Feb 2019 15:08:47 +1100 [thread overview]
Message-ID: <a17b4e11-3409-502d-f09b-2d129430be3a@ozlabs.ru> (raw)
In-Reply-To: <20190118140758.829-3-farosas@linux.ibm.com>
On 19/01/2019 01:07, Fabiano Rosas wrote:
> The upcoming single step functionality (KVM HV) needs to write to the
> Trace Interrupt handler's address for its mechanism to work. The
> address is calculated by applying an offset according to the value of
> the Alternate Interrupt Location (AIL) bits in the LPCR register.
>
> Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
> ---
> target/ppc/cpu.h | 1 +
> target/ppc/excp_helper.c | 12 ++++++++++++
> 2 files changed, 13 insertions(+)
>
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 486abaf99b..2185ef5e67 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -1256,6 +1256,7 @@ struct PPCVirtualHypervisorClass {
> OBJECT_GET_CLASS(PPCVirtualHypervisorClass, (obj), \
> TYPE_PPC_VIRTUAL_HYPERVISOR)
>
> +target_ulong ppc_get_trace_int_handler_addr(CPUState *cs);
> void ppc_cpu_do_interrupt(CPUState *cpu);
> bool ppc_cpu_exec_interrupt(CPUState *cpu, int int_req);
> void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index 337a3ef8bb..5d13d05c3b 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -746,6 +746,18 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
> check_tlb_flush(env, false);
> }
>
> +target_ulong ppc_get_trace_int_handler_addr(CPUState *cs)
> +{
> + PowerPCCPU *cpu = POWERPC_CPU(cs);
> + CPUPPCState *env = &cpu->env;
> + int ail;
> +
> + ail = (env->spr[SPR_LPCR] & LPCR_AIL) >> LPCR_AIL_SHIFT;
> + return env->excp_vectors[POWERPC_EXCP_TRACE] |
> + ppc_excp_vector_offset(cs, ail);
This fails with:
cpu_abort(cs, "Invalid AIL combination %d\n", ail)
as @ail calculates as 0 when I am just about to start a guest and try to
set breakpoint at the initial $nip (set here:
https://git.qemu.org/?p=qemu.git;a=blob;f=hw/ppc/spapr_cpu_core.c;h=993759db47fa33b11a984c3043049297b06c0420;hb=38441756b70eec5807b5f60dad11a93a91199866#l90
)
This is long before h_set_mode is called.
> +}
> +
> +
> void ppc_cpu_do_interrupt(CPUState *cs)
> {
> PowerPCCPU *cpu = POWERPC_CPU(cs);
>
--
Alexey
next prev parent reply other threads:[~2019-02-01 4:09 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-18 14:07 [Qemu-devel] [RFC PATCH v3 0/7] target/ppc: single step for KVM HV Fabiano Rosas
2019-01-18 14:07 ` [Qemu-devel] [RFC PATCH v3 1/7] target/ppc: Move exception vector offset computation into a function Fabiano Rosas
2019-01-25 1:22 ` Alexey Kardashevskiy
2019-01-18 14:07 ` [Qemu-devel] [RFC PATCH v3 2/7] target/ppc: Add ppc_get_trace_int_handler_addr Fabiano Rosas
2019-01-25 1:22 ` Alexey Kardashevskiy
2019-02-01 4:08 ` Alexey Kardashevskiy [this message]
2019-01-18 14:07 ` [Qemu-devel] [RFC PATCH v3 3/7] kvm: support checking for single step capability Fabiano Rosas
2019-01-25 1:24 ` Alexey Kardashevskiy
2019-01-18 14:07 ` [Qemu-devel] [RFC PATCH v3 4/7] kvm-all: Introduce kvm_set_singlestep Fabiano Rosas
2019-01-18 14:07 ` [Qemu-devel] [RFC PATCH v3 5/7] target/ppc: Move handling of hardware breakpoints to a separate function Fabiano Rosas
2019-01-18 14:07 ` [Qemu-devel] [RFC PATCH v3 6/7] target/ppc: Refactor kvm_handle_debug Fabiano Rosas
2019-01-25 1:37 ` Alexey Kardashevskiy
2019-01-18 14:07 ` [Qemu-devel] [RFC PATCH v3 7/7] target/ppc: support single stepping with KVM HV Fabiano Rosas
2019-01-25 4:52 ` Alexey Kardashevskiy
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