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([2602:ae:1598:4c01:7ac5:31cc:3997:3a16]) by smtp.gmail.com with ESMTPSA id p20-20020a170902a41400b001ab39cd885esm1941270plq.212.2023.05.25.17.24.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 25 May 2023 17:24:53 -0700 (PDT) Message-ID: Date: Thu, 25 May 2023 17:24:52 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH v3 0/2] accel/tcg: Improvements to atomic128.h Content-Language: en-US From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, alex.bennee@linaro.org References: <20230524183258.1194571-1-richard.henderson@linaro.org> In-Reply-To: <20230524183258.1194571-1-richard.henderson@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::533; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x533.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.091, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_HELO_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 5/24/23 11:32, Richard Henderson wrote: > Changes for v3: > * Most of the v2 patch set merged, except x86_64 atomic128-ldst.h, > which failed testing with clang-11 with debian 11. > > * New patch to change __int128_t detection. > > * This in turn enabled CONFIG_ATOMIC128, which was not ideal. > This clang bug/mis-feature of using a cmpxchg sequence for > implementing __atomic_load_n was already noted for aarch64, > so I should have expected it would also be true for x86_64. > Given that I am adding inline assembly for CPUINFO_ATOMIC_VMOVDQA > anyway, this isn't a big deal, but I did need to adjust the ifdefs. > > > r~ > > > Richard Henderson (2): > meson: Split test for __int128_t type from __int128_t arithmetic > qemu/atomic128: Add x86_64 atomic128-ldst.h > > meson.build | 15 +++-- > host/include/x86_64/host/atomic128-ldst.h | 68 +++++++++++++++++++++++ > include/qemu/int128.h | 4 +- > 3 files changed, 80 insertions(+), 7 deletions(-) > create mode 100644 host/include/x86_64/host/atomic128-ldst.h > Superseded by Message-Id: <20230526002334.1760495-1-richard.henderson@linaro.org> r~