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[86.227.5.120]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b5e8dc1fd7sm1514622f8f.26.2025.07.10.03.46.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 10 Jul 2025 03:46:23 -0700 (PDT) Message-ID: Date: Thu, 10 Jul 2025 12:46:21 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 01/18] hw/i386/pc_piix.c: restrict isapc machine to 32-bit CPUs To: Mark Cave-Ayland , pbonzini@redhat.com, mst@redhat.com, marcel.apfelbaum@gmail.com, eduardo@habkost.net, imammedo@redhat.com, qemu-devel@nongnu.org References: <20250710085308.420774-1-mark.caveayland@nutanix.com> <20250710085308.420774-2-mark.caveayland@nutanix.com> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20250710085308.420774-2-mark.caveayland@nutanix.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 10/7/25 10:52, Mark Cave-Ayland wrote: > The isapc machine represents a legacy ISA PC with a 486 CPU. Whilst it is > possible to specify any CPU via -cpu on the command line, it makes no > sense to allow modern 64-bit CPUs to be used. > > Restrict the isapc machine to the available 32-bit CPUs, taking care to > handle the case where if a user inadvertently uses -cpu max then the "best" > 32-bit CPU is used (in this case the pentium3). > > Signed-off-by: Mark Cave-Ayland > --- > hw/i386/pc_piix.c | 25 +++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c > index ea7572e783..67c52d79b2 100644 > --- a/hw/i386/pc_piix.c > +++ b/hw/i386/pc_piix.c > @@ -418,6 +418,18 @@ static void pc_set_south_bridge(Object *obj, int value, Error **errp) > #ifdef CONFIG_ISAPC > static void pc_init_isa(MachineState *machine) > { > + /* > + * There is a small chance that someone unintentionally passes "-cpu max" > + * for the isapc machine, which will provide a much more modern 32-bit > + * CPU than would be expected for an ISA-era PC. If the "max" cpu type has > + * been specified, choose the "best" 32-bit cpu possible which we consider > + * be the pentium3 (deliberately choosing an Intel CPU given that the > + * default 486 CPU for the isapc machine is also an Intel CPU). > + */ > + if (!strcmp(machine->cpu_type, X86_CPU_TYPE_NAME("max"))) { > + machine->cpu_type = X86_CPU_TYPE_NAME("pentium3"); Please warn() the user, otherwise: Reviewed-by: Philippe Mathieu-Daudé > + } > + > pc_init1(machine, NULL); > }