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From: "Wang Cheng Yeh" <cywang.eda@gmail.com>
To: Thiemo Seufer <ths@networkno.de>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] scsi patch
Date: Mon, 19 Mar 2007 22:37:06 +0800	[thread overview]
Message-ID: <a20f395e0703190737s716eecfan6683e842caaa4f8@mail.gmail.com> (raw)
In-Reply-To: <20070319124211.GD7744@networkno.de>

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because
(1) address of SCRATCHA is 0x34
(2) address from SCRATCHB to SCRATCHR are 0x5c ~ 0x9f

you just see the code about part (2).
I think the access code is right.

2007/3/19, Thiemo Seufer <ths@networkno.de>:
>
> ????????? wrote:
> > --- ../../tmp/qemu-0.9.0/hw/lsi53c895a.c        2007-02-06 07:01:
> > 54.000000000 +0800
> > +++ lsi53c895a.c        2007-03-08 20:50:03.094098835 +0800
> > @@ -251,7 +251,7 @@
> >     uint32_t ia;
> >     uint32_t sbc;
> >     uint32_t csbc;
> > -    uint32_t scratch[13]; /* SCRATCHA-SCRATCHR */
> > +    uint32_t scratch[18]; /* SCRATCHA-SCRATCHR */
>
> This still looks inconsistent. SCRATCHR suggests 18 available
> registers, but the code below handles only 17 scratch registers.
>
> Could you check what's the right thing there?
> Otherwise the patch looks good.
>
>
> Thiemo
>

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  reply	other threads:[~2007-03-19 14:38 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-03-10 14:03 [Qemu-devel] scsi patch 王成業
2007-03-11  4:27 ` 王成業
2007-03-14 15:15 ` 王成業
2007-03-19 12:42   ` Thiemo Seufer
2007-03-19 14:37     ` Wang Cheng Yeh [this message]
  -- strict thread matches above, loose matches on Subject: below --
2007-04-25  5:48 Wang Cheng Yeh
2007-04-26 19:26 ` Blue Swirl

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