From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1HTJ0S-0005NX-EM for qemu-devel@nongnu.org; Mon, 19 Mar 2007 10:38:40 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1HTJ0R-0005NK-1H for qemu-devel@nongnu.org; Mon, 19 Mar 2007 10:38:40 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1HTJ0Q-0005NH-Rd for qemu-devel@nongnu.org; Mon, 19 Mar 2007 09:38:38 -0500 Received: from nf-out-0910.google.com ([64.233.182.184]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1HTIyx-0006X9-P4 for qemu-devel@nongnu.org; Mon, 19 Mar 2007 10:37:08 -0400 Received: by nf-out-0910.google.com with SMTP id c31so1871220nfb for ; Mon, 19 Mar 2007 07:37:07 -0700 (PDT) Message-ID: Date: Mon, 19 Mar 2007 22:37:06 +0800 From: "Wang Cheng Yeh" Subject: Re: [Qemu-devel] scsi patch In-Reply-To: <20070319124211.GD7744@networkno.de> MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="----=_Part_132693_18086995.1174315026533" References: <20070319124211.GD7744@networkno.de> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Thiemo Seufer Cc: qemu-devel@nongnu.org ------=_Part_132693_18086995.1174315026533 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline because (1) address of SCRATCHA is 0x34 (2) address from SCRATCHB to SCRATCHR are 0x5c ~ 0x9f you just see the code about part (2). I think the access code is right. 2007/3/19, Thiemo Seufer : > > ????????? wrote: > > --- ../../tmp/qemu-0.9.0/hw/lsi53c895a.c 2007-02-06 07:01: > > 54.000000000 +0800 > > +++ lsi53c895a.c 2007-03-08 20:50:03.094098835 +0800 > > @@ -251,7 +251,7 @@ > > uint32_t ia; > > uint32_t sbc; > > uint32_t csbc; > > - uint32_t scratch[13]; /* SCRATCHA-SCRATCHR */ > > + uint32_t scratch[18]; /* SCRATCHA-SCRATCHR */ > > This still looks inconsistent. SCRATCHR suggests 18 available > registers, but the code below handles only 17 scratch registers. > > Could you check what's the right thing there? > Otherwise the patch looks good. > > > Thiemo > ------=_Part_132693_18086995.1174315026533 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 7bit Content-Disposition: inline because
(1) address of SCRATCHA is 0x34
(2) address from SCRATCHB to SCRATCHR are 0x5c ~ 0x9f

you just see the code about part (2).
I think the access code is right.

2007/3/19, Thiemo Seufer < ths@networkno.de>:
????????? wrote:
> --- ../../tmp/qemu- 0.9.0/hw/lsi53c895a.c        2007-02-06 07:01:
> 54.000000000 +0800
> +++ lsi53c895a.c        2007-03-08 20:50:03.094098835 +0800
> @@ -251,7 +251,7 @@
>     uint32_t ia;
>     uint32_t sbc;
>     uint32_t csbc;
> -    uint32_t scratch[13]; /* SCRATCHA-SCRATCHR */
> +    uint32_t scratch[18]; /* SCRATCHA-SCRATCHR */

This still looks inconsistent. SCRATCHR suggests 18 available
registers, but the code below handles only 17 scratch registers.

Could you check what's the right thing there?
Otherwise the patch looks good.


Thiemo

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