Re: [PATCH v6 7/8] target/riscv: Add any32 and max32 CPU for RV64 QEMU

[LIU Zhiwei <zhiwei_liu@linux.alibaba.com>]

On 2024/7/24 23:01, Andrew Jones wrote:
> On Sat, Jul 20, 2024 at 07:11:48AM GMT, LIU Zhiwei wrote:
>> We may need 32-bit max or 32-bit any CPU for RV64 QEMU. Thus we add
>> these two CPUs for RV64 QEMU.
>>
>> The reason we don't expose them to RV32 QEMU is that we already have
>> max or any cpu with the same configuration. Another reason is that
>> we want to follow the RISC-V custom where addw instruction doesn't
>> exist in RV32 CPU.
>>
>> Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
>> Suggested-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
>> ---
>>   target/riscv/cpu-qom.h |  2 ++
>>   target/riscv/cpu.c     | 13 ++++++++-----
>>   2 files changed, 10 insertions(+), 5 deletions(-)
>>
>> diff --git a/target/riscv/cpu-qom.h b/target/riscv/cpu-qom.h
>> index 3670cfe6d9..9f91743b78 100644
>> --- a/target/riscv/cpu-qom.h
>> +++ b/target/riscv/cpu-qom.h
>> @@ -31,6 +31,8 @@
>>   
>>   #define TYPE_RISCV_CPU_ANY              RISCV_CPU_TYPE_NAME("any")
>>   #define TYPE_RISCV_CPU_MAX              RISCV_CPU_TYPE_NAME("max")
>> +#define TYPE_RISCV_CPU_ANY32            RISCV_CPU_TYPE_NAME("any32")
> 'any' is on its way out[1], so we probably shouldn't bother adding any32
> at all with this series
>
> [1] https://lore.kernel.org/all/20240724130717.95629-1-philmd@linaro.org/

Agree.

Thanks,
Zhiwei

>
> Thanks,
> drew