From: Richard Henderson <richard.henderson@linaro.org>
To: Idan Horowitz <idan.horowitz@gmail.com>, qemu-arm@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Subject: Re: [PATCH] target/arm: Fix MTE access checks for disabled SEL2
Date: Mon, 28 Mar 2022 12:04:23 -0600 [thread overview]
Message-ID: <a2e29af5-705a-19b0-b7ad-0126f8d441b0@linaro.org> (raw)
In-Reply-To: <20220328173107.311267-1-idan.horowitz@gmail.com>
On 3/28/22 11:31, Idan Horowitz wrote:
> While not mentioned anywhere in the actual specification text, the
> HCR_EL2.ATA bit is treated as '1' when EL2 is disabled at the current
> security state. This can be observed in the psuedo-code implementation
> of AArch64.AllocationTagAccessIsEnabled().
>
> Signed-off-by: Idan Horowitz <idan.horowitz@gmail.com>
> ---
> target/arm/helper.c | 2 +-
> target/arm/internals.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
I was immediately thinking, didn't I just fix this?
But I was patching pauth. Anyway, good catch.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2022-03-28 18:06 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-28 17:31 [PATCH] target/arm: Fix MTE access checks for disabled SEL2 Idan Horowitz
2022-03-28 18:04 ` Richard Henderson [this message]
2022-03-31 8:26 ` Peter Maydell
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