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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Subject: Re: [PATCH v3 4/5] tcg: Add host memory barriers to cpu_ldst.h interfaces
Date: Tue, 20 Jun 2023 16:22:01 +0200	[thread overview]
Message-ID: <a313b36b-dcc1-f812-ccbd-afed1cbd523b@linaro.org> (raw)
In-Reply-To: <20230619142333.429028-5-richard.henderson@linaro.org>

On 19/6/23 16:23, Richard Henderson wrote:
> Bring the helpers into line with the rest of tcg in respecting
> guest memory ordering.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   accel/tcg/internal.h  | 34 ++++++++++++++++++++++++++++++++++
>   accel/tcg/cputlb.c    | 10 ++++++++++
>   accel/tcg/user-exec.c | 10 ++++++++++
>   3 files changed, 54 insertions(+)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



  reply	other threads:[~2023-06-20 14:22 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-19 14:23 [PATCH v3 0/5] tcg: Issue memory barriers for guest memory model Richard Henderson
2023-06-19 14:23 ` [PATCH v3 1/5] target/microblaze: Define TCG_GUEST_DEFAULT_MO Richard Henderson
2023-06-20 14:47   ` Philippe Mathieu-Daudé
2023-06-20 15:41   ` Philippe Mathieu-Daudé
2023-06-20 15:46     ` Richard Henderson
2023-06-24 17:29   ` Edgar E. Iglesias
2023-06-19 14:23 ` [PATCH v3 2/5] tcg: Do not elide memory barriers for !CF_PARALLEL in system mode Richard Henderson
2023-06-19 14:23 ` [PATCH v3 3/5] tcg: Elide memory barriers implied by the host memory model Richard Henderson
2023-06-19 14:23 ` [PATCH v3 4/5] tcg: Add host memory barriers to cpu_ldst.h interfaces Richard Henderson
2023-06-20 14:22   ` Philippe Mathieu-Daudé [this message]
2023-06-19 14:23 ` [PATCH v3 5/5] accel/tcg: Remove check_tcg_memory_orders_compatible Richard Henderson
2023-06-19 14:43 ` [PATCH v3 0/5] tcg: Issue memory barriers for guest memory model Richard Henderson
2023-06-26 10:52 ` Richard Henderson

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