From: Thomas Huth <thuth@redhat.com>
To: Roque Arcudia Hernandez <roqueh@google.com>, qemu-devel@nongnu.org
Cc: qemu-arm <qemu-arm@nongnu.org>
Subject: Re: Hard limit on 256 IRQs in qtest
Date: Fri, 22 Jul 2022 11:26:33 +0200 [thread overview]
Message-ID: <a33c9ea1-e622-ae8d-5f12-1b20599e8b4b@redhat.com> (raw)
In-Reply-To: <CAKbPEtZxCGfz4_h8_YMg2bb-kQF0sorLAppKcBTweV0gxM+OLA@mail.gmail.com>
On 21/07/2022 18.17, Roque Arcudia Hernandez wrote:
> Hello,
>
>
> To write a qtest for an SoC using ARM GICv3 as interrupt controller the
> qtest infrastructure is short on IRQs.
>
> File tests/qtest/libqtest.c defines:
>
> #define MAX_IRQ 256
>
> Which is the number of elements in the array that is used to keep track of
> the value of the irq gpio:
>
> bool irq_level[MAX_IRQ];
>
> The GICv3 can take up to 1020. The SoC we are trying to emulate uses more
> than the current 256 limit we can observe at the GIC input. If we focus just
> on the external interrupt range the GIC would need 1020 - 32 = 988 IRQs.
> Will it be OK to make this change to the qtest infrastructure?
I guess it should be fine. Just not that you have to adjust the same #define
in softmmu/qtest.c, too.
Thomas
prev parent reply other threads:[~2022-07-22 9:28 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-21 16:17 Hard limit on 256 IRQs in qtest Roque Arcudia Hernandez
2022-07-22 9:26 ` Thomas Huth [this message]
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