From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, alex.bennee@linaro.org
Subject: Re: [Qemu-devel] [PATCH v3 4/5] target/arm: Add ZCR_ELx
Date: Tue, 23 Jan 2018 08:23:05 -0800 [thread overview]
Message-ID: <a3625e43-0a8c-b63d-12a9-f955ba2a8b23@linaro.org> (raw)
In-Reply-To: <20180123035349.24538-5-richard.henderson@linaro.org>
On 01/22/2018 07:53 PM, Richard Henderson wrote:
> +static const ARMCPRegInfo zcr_el1_reginfo = {
> + .name = "ZCR_EL1", .state = ARM_CP_STATE_AA64,
> + .opc0 = 3, .opc1 = 0, .crn = 1, .crm = 2, .opc2 = 0,
> + .access = PL1_RW, .accessfn = zcr_access, .type = ARM_CP_64BIT,
> + .fieldoffset = offsetof(CPUARMState, vfp.zcr_el[1]),
> + .writefn = zcr_write, .raw_writefn = raw_write
> +};
Ho hum. Got far enough in the rest of my rebasing to see that .type must be
dropped -- there's an assert saying STATE_AA64 implies 64BIT and shouldn't be
repeated.
r~
next prev parent reply other threads:[~2018-01-23 16:23 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-23 3:53 [Qemu-devel] [PATCH v3 0/5] target/arm: Preparatory work for SVE Richard Henderson
2018-01-23 3:53 ` [Qemu-devel] [PATCH v3 1/5] target/arm: Expand vector registers " Richard Henderson
2018-01-29 17:30 ` Peter Maydell
2018-01-23 3:53 ` [Qemu-devel] [PATCH v3 2/5] target/arm: Add predicate " Richard Henderson
2018-01-23 11:46 ` Alex Bennée
2018-01-29 17:30 ` Peter Maydell
2018-01-23 3:53 ` [Qemu-devel] [PATCH v3 3/5] target/arm: Add SVE to migration state Richard Henderson
2018-01-26 15:05 ` Alex Bennée
2018-01-29 17:32 ` Peter Maydell
2018-01-23 3:53 ` [Qemu-devel] [PATCH v3 4/5] target/arm: Add ZCR_ELx Richard Henderson
2018-01-23 16:23 ` Richard Henderson [this message]
2018-01-29 17:48 ` Peter Maydell
2018-01-23 3:53 ` [Qemu-devel] [PATCH v3 5/5] target/arm: Add SVE state to TB->FLAGS Richard Henderson
2018-01-29 18:01 ` Peter Maydell
2018-01-29 18:16 ` Richard Henderson
2018-02-08 14:34 ` [Qemu-devel] [PATCH v3 0/5] target/arm: Preparatory work for SVE Peter Maydell
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