Re: [PATCH v2 2/3] hw/riscv: Replace target_ulong uses

["Philippe Mathieu-Daudé" <philmd@linaro.org>]

On 30/10/25 13:32, Anton Johansson wrote:
> On 29/10/25, Philippe Mathieu-Daudé wrote:
>> On 27/10/25 13:35, Anton Johansson wrote:
>>> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>> Signed-off-by: Anton Johansson <anjo@rev.ng>
>>> ---
>>>    hw/riscv/riscv-iommu.c | 6 ++++--
>>>    hw/riscv/riscv_hart.c  | 2 +-
>>>    2 files changed, 5 insertions(+), 3 deletions(-)


>>> diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c
>>> index c7e98a4308..65d2c92018 100644
>>> --- a/hw/riscv/riscv_hart.c
>>> +++ b/hw/riscv/riscv_hart.c
>>> @@ -93,7 +93,7 @@ static bool csr_qtest_callback(CharBackend *chr, gchar **words)
>>>            g_assert(rc == 0);
>>>            csr_call(words[1], cpu, csr, &val);
>>> -        qtest_sendf(chr, "OK 0 "TARGET_FMT_lx"\n", (target_ulong)val);
>>> +        qtest_sendf(chr, "OK 0 %"PRIx64"\n", val);
>>>            return true;
>>>        }
>>>
>>
>> What about csr_call()?
> 
> csr_call() is handled in the other series making cpu.h target agnostic,
> there we expose 64 bit variants of reading/writing CSRs which are then
> used by csr_call().

Ah, good then, thanks!