From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>
Subject: Re: [PATCH for-10.1 07/10] target/arm: Correct sense of FPCR.AH test for FMAXQV and FMINQV
Date: Mon, 21 Jul 2025 10:21:44 +0200 [thread overview]
Message-ID: <a3ea9869-dac7-4c20-9c07-5623e137a7f8@linaro.org> (raw)
In-Reply-To: <20250718173032.2498900-8-peter.maydell@linaro.org>
On 18/7/25 19:30, Peter Maydell wrote:
> When we implemented the FMAXQV and FMINQV insns we accidentally
> inverted the sense of the FPCR.AH test, so we gave the AH=1 behaviour
> when FPCR.AH was zero, and vice-versa. (The difference is limited to
> hadling of negative zero and NaN inputs.)
Typo "handling"
>
> Fixes: 1de7ecfc12d05 ("target/arm: Implement FADDQV, F{MIN, MAX}{NM}QV for SVE2p1")
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> target/arm/tcg/translate-sve.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
next prev parent reply other threads:[~2025-07-21 8:22 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-18 17:30 [PATCH for-10.1 00/10] target/arm: Some SVE2p1 fixes Peter Maydell
2025-07-18 17:30 ` [PATCH for-10.1 01/10] target/arm: Add BFADD, BFSUB, BFMUL (unpredicated) Peter Maydell
2025-07-18 21:29 ` Richard Henderson
2025-07-18 17:30 ` [PATCH for-10.1 02/10] target/arm: Add BFADD, BFSUB, BFMUL, BFMAXNM, BFMINNM (predicated) Peter Maydell
2025-07-18 21:32 ` Richard Henderson
2025-07-18 17:30 ` [PATCH for-10.1 03/10] target/arm: Add BFMIN, BFMAX (predicated) Peter Maydell
2025-07-18 21:34 ` Richard Henderson
2025-07-18 17:30 ` [PATCH for-10.1 04/10] target/arm: Add BFMUL (indexed) Peter Maydell
2025-07-18 21:38 ` Richard Henderson
2025-07-18 17:30 ` [PATCH for-10.1 05/10] target/arm: Add BFMLA, BFMLS (vectors) Peter Maydell
2025-07-18 21:40 ` Richard Henderson
2025-07-18 17:30 ` [PATCH for-10.1 06/10] target/arm: Add BFMLA, BFMLS (indexed) Peter Maydell
2025-07-18 21:42 ` Richard Henderson
2025-07-18 17:30 ` [PATCH for-10.1 07/10] target/arm: Correct sense of FPCR.AH test for FMAXQV and FMINQV Peter Maydell
2025-07-18 21:43 ` Richard Henderson
2025-07-21 8:21 ` Philippe Mathieu-Daudé [this message]
2025-07-18 17:30 ` [PATCH for-10.1 08/10] target/arm: Don't nest H() macro calls in SVE DO_REDUCE Peter Maydell
2025-07-18 21:44 ` Richard Henderson
2025-07-18 17:30 ` [PATCH for-10.1 09/10] target/arm: Honour FPCR.AH=1 default NaN value in FMAXNMQV, FMINNMQV Peter Maydell
2025-07-18 21:45 ` Richard Henderson
2025-07-18 17:30 ` [PATCH for-10.1 10/10] target/arm: Make LD1Q decode and trans fn agree about a->u Peter Maydell
2025-07-18 21:46 ` Richard Henderson
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