From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, alex.bennee@linaro.org
Subject: Re: [Qemu-devel] [PATCH 2/3] target/arm: Restructure disas_fp_int_conv
Date: Mon, 4 Feb 2019 11:04:14 +0000 [thread overview]
Message-ID: <a4109cd7-184e-de1f-7d2a-0576eba1e8ed@linaro.org> (raw)
In-Reply-To: <20190204052712.30833-3-richard.henderson@linaro.org>
On 2/4/19 5:27 AM, Richard Henderson wrote:
> + default:
> + switch (sf << 6 | type << 5 | rmode << 3 | opcode) {
> + case 0b01100110: /* FMOV half <-> 32-bit int */
> + case 0b01100111:
> + case 0b11100110: /* FMOV half <-> 64-bit int */
> + case 0b11100111:
> + if (!dc_isar_feature(aa64_fp16, s)) {
> + goto do_unallocated;
> + }
> + /* fallthru */
> + case 0b00000110: /* FMOV 32-bit */
> + case 0b00000111:
> + case 0b10100110: /* FMOV 64-bit */
> + case 0b10100111:
> + case 0b11001110: /* FMOV top half of 128-bit */
> + case 0b11001111:
There's an error in here that a full risu run has diagnosed.
r~
next prev parent reply other threads:[~2019-02-04 11:04 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-04 5:27 [Qemu-devel] [PATCH 0/3] target/arm: Implement ARMv8.3-JSConv Richard Henderson
2019-02-04 5:27 ` [Qemu-devel] [PATCH 1/3] target/arm: Force result size into dp after operation Richard Henderson
2019-02-04 14:55 ` Peter Maydell
2019-02-04 5:27 ` [Qemu-devel] [PATCH 2/3] target/arm: Restructure disas_fp_int_conv Richard Henderson
2019-02-04 11:04 ` Richard Henderson [this message]
2019-02-04 5:27 ` [Qemu-devel] [PATCH 3/3] target/arm: Implement ARMv8.3-JSConv Richard Henderson
2019-02-04 8:00 ` Laurent Desnogues
2019-02-04 10:17 ` Richard Henderson
2019-02-04 11:21 ` Peter Maydell
2019-02-04 11:34 ` Richard Henderson
2019-02-04 5:48 ` [Qemu-devel] [PATCH 0/3] " no-reply
2019-02-04 14:59 ` Peter Maydell
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