From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56718) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c0AO1-0004p7-B1 for qemu-devel@nongnu.org; Fri, 28 Oct 2016 12:52:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c0ANw-0002JT-Bh for qemu-devel@nongnu.org; Fri, 28 Oct 2016 12:52:09 -0400 Received: from 6.mo68.mail-out.ovh.net ([46.105.63.100]:53037) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1c0ANw-0002JF-5g for qemu-devel@nongnu.org; Fri, 28 Oct 2016 12:52:04 -0400 Received: from player788.ha.ovh.net (b7.ovh.net [213.186.33.57]) by mo68.mail-out.ovh.net (Postfix) with ESMTP id D5BB363C9 for ; Fri, 28 Oct 2016 18:52:02 +0200 (CEST) References: <1477620301-24822-1-git-send-email-david@gibson.dropbear.id.au> <1477673163.32311.39.camel@kernel.crashing.org> From: =?UTF-8?Q?C=c3=a9dric_Le_Goater?= Message-ID: Date: Fri, 28 Oct 2016 18:51:59 +0200 MIME-Version: 1.0 In-Reply-To: <1477673163.32311.39.camel@kernel.crashing.org> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [RFC] powernv: CPU compatibility modes don't make sense for powernv List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Benjamin Herrenschmidt , David Gibson Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org On 10/28/2016 06:46 PM, Benjamin Herrenschmidt wrote: > On Fri, 2016-10-28 at 18:40 +0200, C=C3=A9dric Le Goater wrote: >> =20 >> It makes perfect sense. The "cpu-version" property is for PAPR, not >> for OPAL. >> hostboot and skiboot put SPR_PVR in this property.=20 >> >> I will be careful using 'CPU_CORE(pc)->nr_threads' in the ICP patches >> also.=20 >=20 > No, the cpu-version is part of the old OF bindings afaik, at least it > exists under OPAL, so it should be there but yes, it should just > contain the PVR. powernv_create_core_node() sets "cpu-version" twice : _FDT((fdt_setprop_cell(fdt, offset, "cpu-version", env->spr[SPR_PVR])= )); and then :=20 if (cpu->cpu_version) { _FDT((fdt_setprop_cell(fdt, offset, "cpu-version", cpu->cpu_versi= on))); } but the patch only removes the second one but you don't really see the fi= rst ... I should have said that. Cheers, C.=20 > Cheers, > Ben. >=20 >> Reviewed-by: C=C3=A9dric Le Goater >> >> Thanks, >> >> C. >> >> >>> >>> >>> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c >>> index 82276e0..6af3424 100644 >>> --- a/hw/ppc/pnv.c >>> +++ b/hw/ppc/pnv.c >>> @@ -110,7 +110,7 @@ static void powernv_create_core_node(PnvChip >>> *chip, PnvCore *pc, void *fdt) >>> CPUState *cs =3D CPU(DEVICE(pc->threads)); >>> DeviceClass *dc =3D DEVICE_GET_CLASS(cs); >>> PowerPCCPU *cpu =3D POWERPC_CPU(cs); >>> - int smt_threads =3D ppc_get_compat_smt_threads(cpu); >>> + int smt_threads =3D CPU_CORE(pc)->nr_threads; >>> CPUPPCState *env =3D &cpu->env; >>> PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(cs); >>> uint32_t servers_prop[smt_threads]; >>> @@ -206,10 +206,6 @@ static void powernv_create_core_node(PnvChip >>> *chip, PnvCore *pc, void *fdt) >>> _FDT((fdt_setprop(fdt, offset, "ibm,pa-features", >>> pa_features, sizeof(pa_features)))); >>> =20 >>> - if (cpu->cpu_version) { >>> - _FDT((fdt_setprop_cell(fdt, offset, "cpu-version", cpu- >>>> cpu_version))); >>> - } >>> - >>> /* Build interrupt servers properties */ >>> for (i =3D 0; i < smt_threads; i++) { >>> servers_prop[i] =3D cpu_to_be32(pc->pir + i); >>>