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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: "Marc-André Lureau" <marcandre.lureau@redhat.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Evgeny Iakovlev" <eiakovlev@linux.microsoft.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Gavin Shan" <gshan@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	qemu-arm@nongnu.org, "Mikko Rapeli" <mikko.rapeli@linaro.org>
Subject: Re: [RFC PATCH v2 11/11] hw/char/pl011: Implement TX FIFO
Date: Fri, 13 Oct 2023 16:05:18 +0200	[thread overview]
Message-ID: <a4187886-148a-d8a3-b862-e0bced33e62c@linaro.org> (raw)
In-Reply-To: <f9c35a6c-be32-7758-d78a-e63449f864b8@linaro.org>

On 14/7/23 09:27, Richard Henderson wrote:
> On 7/10/23 18:51, Philippe Mathieu-Daudé wrote:
>> +static gboolean pl011_xmit(void *do_not_use, GIOCondition cond, void 
>> *opaque)
>> +{
>> +    PL011State *s = opaque;
>> +    int ret;
>> +    const uint8_t *buf;
>> +    uint32_t buflen;
>> +    uint32_t count;
>> +    bool tx_enabled;
>> +
>> +    if (!qemu_chr_fe_backend_connected(&s->chr)) {
>> +        /* Instant drain the fifo when there's no back-end */
>> +        return pl011_drain_tx(s);
>> +    }
>> +
>> +    tx_enabled = s->cr & CR_UARTEN;
> 
> What happened to "Hello, World"?  We ought to be consistent.

What do you mean?

> For actual modeling, I think you need TXE too.



      reply	other threads:[~2023-10-13 14:06 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-10 17:50 [PATCH v2 00/11] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Philippe Mathieu-Daudé
2023-07-10 17:50 ` [PATCH v2 01/11] hw/char/pl011: Restrict MemoryRegionOps implementation access sizes Philippe Mathieu-Daudé
2023-07-14  6:47   ` Richard Henderson
2023-07-10 17:50 ` [PATCH v2 02/11] hw/char/pl011: Display register name in trace events Philippe Mathieu-Daudé
2023-07-14  6:49   ` Richard Henderson
2023-07-10 17:50 ` [PATCH v2 03/11] hw/char/pl011: Remove duplicated PL011_INT_[RT]X definitions Philippe Mathieu-Daudé
2023-07-14  6:50   ` Richard Henderson
2023-07-10 17:50 ` [PATCH v2 04/11] hw/char/pl011: Replace magic values by register field definitions Philippe Mathieu-Daudé
2023-07-14  6:54   ` Richard Henderson
2023-07-10 17:50 ` [PATCH v2 05/11] hw/char/pl011: Split RX/TX path of pl011_reset_fifo() Philippe Mathieu-Daudé
2023-07-14  6:56   ` Richard Henderson
2023-07-10 17:50 ` [PATCH v2 06/11] hw/char/pl011: Extract pl011_write_txdata() from pl011_write() Philippe Mathieu-Daudé
2023-07-14  6:58   ` Richard Henderson
2023-10-12 13:07     ` Philippe Mathieu-Daudé
2023-10-12 14:25       ` Philippe Mathieu-Daudé
2023-07-10 17:50 ` [PATCH v2 07/11] hw/char/pl011: Extract pl011_read_rxdata() from pl011_read() Philippe Mathieu-Daudé
2023-07-14  7:00   ` Richard Henderson
2023-07-10 17:50 ` [PATCH v2 08/11] hw/char/pl011: Warn when using disabled transmitter Philippe Mathieu-Daudé
2023-07-14  7:01   ` Richard Henderson
2023-07-10 17:51 ` [PATCH v2 09/11] hw/char/pl011: Check if receiver is enabled Philippe Mathieu-Daudé
2023-07-14  7:03   ` Richard Henderson
2023-07-10 17:51 ` [PATCH v2 10/11] hw/char/pl011: Rename RX FIFO methods Philippe Mathieu-Daudé
2023-07-14  7:06   ` Richard Henderson
2023-07-10 17:51 ` [RFC PATCH v2 11/11] hw/char/pl011: Implement TX FIFO Philippe Mathieu-Daudé
2023-07-14  7:27   ` Richard Henderson
2023-10-13 14:05     ` Philippe Mathieu-Daudé [this message]

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