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Thu, 21 Oct 2021 14:58:40 -0700 (PDT) Subject: Re: [PATCH v3 16/22] target/ppc: Move dtstdc[q]/dtstdg[q] to decodetree To: Luis Pires , qemu-devel@nongnu.org, qemu-ppc@nongnu.org References: <20210910112624.72748-1-luis.pires@eldorado.org.br> <20210910112624.72748-17-luis.pires@eldorado.org.br> From: Richard Henderson Message-ID: Date: Thu, 21 Oct 2021 14:58:38 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <20210910112624.72748-17-luis.pires@eldorado.org.br> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52b.google.com X-Spam_score_int: -49 X-Spam_score: -5.0 X-Spam_bar: ----- X-Spam_report: (-5.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-2.867, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= , groug@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 9/10/21 4:26 AM, Luis Pires wrote: > +&Z22_bf_fra bf fra dm > +@Z22_bf_fra ...... bf:3 .. fra:5 dm:6 ......... . &Z22_bf_fra > + > +%z22_frap 17:4 !function=times_2 > +@Z22_bf_frap ...... bf:3 .. ....0 dm:6 ......... . &Z22_bf_fra fra=%z22_frap How confusing. There's a typo in the manual for these insns, with the minor opcode (XO) field at the wrong location. It's correct in the summary of instruction formats at the beginning of the manual. > -#define GEN_DFP_BF_A_DCM(name) \ > -static void gen_##name(DisasContext *ctx) \ > -{ \ > - TCGv_ptr ra; \ > - TCGv_i32 dcm; \ > - if (unlikely(!ctx->fpu_enabled)) { \ > - gen_exception(ctx, POWERPC_EXCP_FPU); \ > - return; \ > - } \ > - gen_update_nip(ctx, ctx->base.pc_next - 4); \ > - ra = gen_fprp_ptr(rA(ctx->opcode)); \ > - dcm = tcg_const_i32(DCM(ctx->opcode)); \ > - gen_helper_##name(cpu_crf[crfD(ctx->opcode)], \ > - cpu_env, ra, dcm); \ > - tcg_temp_free_ptr(ra); \ > - tcg_temp_free_i32(dcm); \ > +#define TRANS_DFP_BF_A_DCM(NAME) \ > +static bool trans_##NAME(DisasContext *ctx, arg_##NAME *a) \ > +{ \ > + TCGv_ptr ra; \ > + REQUIRE_INSNS_FLAGS2(ctx, DFP); \ > + REQUIRE_FPU(ctx); \ > + ra = gen_fprp_ptr(a->fra); \ > + gen_helper_##NAME(cpu_crf[a->bf], \ > + cpu_env, ra, tcg_constant_i32(a->dm)); \ > + tcg_temp_free_ptr(ra); \ > + return true; \ > } Functional change: you're no longer storing nip. It does seem wrong, but that fix should be broken out to a separate patch. Otherwise, Reviewed-by: Richard Henderson r~