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[176.131.223.129]) by smtp.gmail.com with ESMTPSA id s7-20020a17090699c700b009adcb6c0f0dsm27571ejn.38.2023.09.14.11.38.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 14 Sep 2023 11:38:37 -0700 (PDT) Message-ID: Date: Thu, 14 Sep 2023 20:38:35 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.15.0 Subject: Re: [PATCH v2 13/24] accel/tcg: Replace CPUState.env_ptr with cpu_env() Content-Language: en-US To: Richard Henderson , qemu-devel@nongnu.org Cc: anjo@rev.ng, ale@rev.ng References: <20230914024435.1381329-1-richard.henderson@linaro.org> <20230914024435.1381329-14-richard.henderson@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::52f; envelope-from=philmd@linaro.org; helo=mail-ed1-x52f.google.com X-Spam_score_int: -35 X-Spam_score: -3.6 X-Spam_bar: --- X-Spam_report: (-3.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-1.473, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 14/9/23 20:15, Richard Henderson wrote: > On 9/14/23 11:12, Philippe Mathieu-Daudé wrote: >> On 14/9/23 04:44, Richard Henderson wrote: >>> Signed-off-by: Richard Henderson >>> --- >>>   include/exec/cpu-all.h               |  1 - >>>   include/hw/core/cpu.h                |  9 ++++++--- >>>   target/arm/common-semi-target.h      |  2 +- >>>   accel/tcg/cpu-exec.c                 |  8 ++++---- >>>   accel/tcg/cputlb.c                   | 18 +++++++++--------- >>>   accel/tcg/translate-all.c            |  4 ++-- >>>   gdbstub/gdbstub.c                    |  4 ++-- >>>   gdbstub/user-target.c                |  2 +- >>>   hw/i386/kvm/clock.c                  |  2 +- >>>   hw/intc/mips_gic.c                   |  2 +- >>>   hw/intc/riscv_aclint.c               | 12 ++++++------ >>>   hw/intc/riscv_imsic.c                |  2 +- >>>   hw/ppc/e500.c                        |  4 ++-- >>>   hw/ppc/spapr.c                       |  2 +- >>>   linux-user/elfload.c                 |  4 ++-- >>>   linux-user/i386/cpu_loop.c           |  2 +- >>>   linux-user/main.c                    |  4 ++-- >>>   linux-user/signal.c                  | 15 +++++++-------- >>>   monitor/hmp-cmds-target.c            |  2 +- >>>   semihosting/arm-compat-semi.c        |  6 +++--- >>>   semihosting/syscalls.c               | 28 ++++++++++++++-------------- >>>   target/alpha/translate.c             |  4 ++-- >>>   target/arm/cpu.c                     |  8 ++++---- >>>   target/arm/helper.c                  |  2 +- >>>   target/arm/tcg/translate-a64.c       |  4 ++-- >>>   target/arm/tcg/translate.c           |  6 +++--- >>>   target/avr/translate.c               |  2 +- >>>   target/cris/translate.c              |  4 ++-- >>>   target/hexagon/translate.c           |  4 ++-- >>>   target/hppa/mem_helper.c             |  2 +- >>>   target/hppa/translate.c              |  4 ++-- >>>   target/i386/tcg/sysemu/excp_helper.c |  2 +- >>>   target/i386/tcg/tcg-cpu.c            |  2 +- >>>   target/i386/tcg/translate.c          |  4 ++-- >>>   target/loongarch/translate.c         |  4 ++-- >>>   target/m68k/translate.c              |  4 ++-- >>>   target/microblaze/translate.c        |  2 +- >>>   target/mips/tcg/sysemu/mips-semi.c   |  4 ++-- >>>   target/mips/tcg/translate.c          |  4 ++-- >>>   target/nios2/translate.c             |  4 ++-- >>>   target/openrisc/translate.c          |  2 +- >>>   target/ppc/excp_helper.c             | 10 +++++----- >>>   target/ppc/translate.c               |  4 ++-- >>>   target/riscv/translate.c             |  6 +++--- >>>   target/rx/cpu.c                      |  3 --- >>>   target/rx/translate.c                |  2 +- >>>   target/s390x/tcg/translate.c         |  2 +- >>>   target/sh4/op_helper.c               |  2 +- >>>   target/sh4/translate.c               |  4 ++-- >>>   target/sparc/translate.c             |  4 ++-- >>>   target/tricore/translate.c           |  4 ++-- >>>   target/xtensa/translate.c            |  4 ++-- >>>   target/i386/tcg/decode-new.c.inc     |  2 +- >>>   53 files changed, 125 insertions(+), 127 deletions(-) >>> >>> diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h >>> index ae0cb2ce50..40831122ce 100644 >>> --- a/include/exec/cpu-all.h >>> +++ b/include/exec/cpu-all.h >>> @@ -433,7 +433,6 @@ void tcg_exec_unrealizefn(CPUState *cpu); >>>    */ >>>   static inline void cpu_set_cpustate_pointers(ArchCPU *cpu) >>>   { >>> -    cpu->parent_obj.env_ptr = &cpu->env; >>>   } >>>   /* Validate correct placement of CPUArchState. */ >>> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h >>> index 99066da2f3..f3fa1ffa95 100644 >>> --- a/include/hw/core/cpu.h >>> +++ b/include/hw/core/cpu.h >>> @@ -440,7 +440,6 @@ struct qemu_work_item; >>>    * @num_ases: number of CPUAddressSpaces in @cpu_ases >>>    * @as: Pointer to the first AddressSpace, for the convenience of >>> targets which >>>    *      only have a single AddressSpace >>> - * @env_ptr: Pointer to subclass-specific CPUArchState field. >>>    * @gdb_regs: Additional GDB registers. >>>    * @gdb_num_regs: Number of total registers accessible to GDB. >>>    * @gdb_num_g_regs: Number of registers in GDB 'g' packets. >>> @@ -511,8 +510,6 @@ struct CPUState { >>>       AddressSpace *as; >>>       MemoryRegion *memory; >>> -    CPUArchState *env_ptr; >>> - >>>       CPUJumpCache *tb_jmp_cache; >>>       struct GDBRegisterState *gdb_regs; >>> @@ -594,6 +591,12 @@ struct CPUState { >>>   QEMU_BUILD_BUG_ON(offsetof(CPUState, neg) + >>> sizeof(CPUNegativeOffsetState) >>>                     != sizeof(CPUState)); >>> +static inline CPUArchState *cpu_env(CPUState *cpu) >>> +{ >>> +    /* We validate that CPUArchState follows CPUState in cpu-all.h. */ >>> +    return (CPUArchState *)(cpu + 1); >>> +} >> >> Do we also need to remove this check? >> >> -- >8 -- >> diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h >> index 40831122ce..3d87548f9b 100644 >> --- a/include/exec/cpu-all.h >> +++ b/include/exec/cpu-all.h >> @@ -437,7 +437,6 @@ static inline void >> cpu_set_cpustate_pointers(ArchCPU *cpu) >> >>   /* Validate correct placement of CPUArchState. */ >>   QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0); >> -QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState)); >> >>   /** >>    * env_archcpu(env) >> --- >> >> I'm getting: >> >> include/qemu/compiler.h:74:36: error: static assertion failed: "not >> expecting: offsetof(ArchCPU, env) != sizeof(CPUState)" >>     74 | #define QEMU_BUILD_BUG_MSG(x, msg) _Static_assert(!(x), msg) >>        |                                    ^~~~~~~~~~~~~~ >> include/qemu/compiler.h:76:30: note: in expansion of macro >> ‘QEMU_BUILD_BUG_MSG’ >>     76 | #define QEMU_BUILD_BUG_ON(x) QEMU_BUILD_BUG_MSG(x, "not >> expecting: " #x) >>        |                              ^~~~~~~~~~~~~~~~~~ >> include/exec/cpu-all.h:440:1: note: in expansion of macro >> ‘QEMU_BUILD_BUG_ON’ >>    440 | QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState)); >>        | ^~~~~~~~~~~~~~~~~ >> ninja: build stopped: subcommand failed. >> > > I presume this is --disable-tcg, since I saw the same thing in CI testing. Yes (I didn't even noticed, I was testing my kvm_only setup). > No, we don't remove the check (that would explicit assumptions > elsewhere), we adjust the alignment of CPUNegativeOffsetState. I'm not sure I understand, should we guard with #ifdef CONFIG_TCG?