From: Richard Henderson <richard.henderson@linaro.org>
To: Jinjie Ruan <ruanjinjie@huawei.com>,
peter.maydell@linaro.org, eduardo@habkost.net,
marcel.apfelbaum@gmail.com, philmd@linaro.org,
wangyanan55@huawei.com, qemu-devel@nongnu.org,
qemu-arm@nongnu.org
Subject: Re: [RFC PATCH v2 07/22] target/arm: Add support for NMI event state
Date: Wed, 21 Feb 2024 11:25:09 -1000 [thread overview]
Message-ID: <a4c733be-450b-4d28-b869-fd80630f3ecb@linaro.org> (raw)
In-Reply-To: <c02228ea-4f24-46f9-b6b3-34cba3059d69@linaro.org>
On 2/21/24 10:10, Richard Henderson wrote:
> On 2/21/24 03:08, Jinjie Ruan via wrote:
>> The NMI exception state include whether the interrupt with super priority
>> is IRQ or FIQ, so add a nmi_is_irq flag in CPUARMState to distinguish it.
>>
>> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
>> ---
>> target/arm/cpu.h | 2 ++
>> target/arm/helper.c | 9 +++++++++
>> 2 files changed, 11 insertions(+)
>>
>> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
>> index 5257343bcb..051e589e19 100644
>> --- a/target/arm/cpu.h
>> +++ b/target/arm/cpu.h
>> @@ -603,6 +603,8 @@ typedef struct CPUArchState {
>> /* State of our input IRQ/FIQ/VIRQ/VFIQ lines */
>> uint32_t irq_line_state;
>> + bool nmi_is_irq;
>
> Why would you need to add this to CPUARMState?
> This has the appearance of requiring only a local variable.
> But it is hard to tell since you do not set it within this patch at all.
According to Arm GIC section 4.6.3 Interrupt superpriority, NMI is always IRQ, never FIQ,
so this is never required.
r~
next prev parent reply other threads:[~2024-02-21 21:31 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-21 13:08 [RFC PATCH v2 00/22] target/arm: Implement FEAT_NMI and FEAT_GICv3_NMI Jinjie Ruan via
2024-02-21 13:08 ` [RFC PATCH v2 01/22] target/arm: Add FEAT_NMI to max Jinjie Ruan via
2024-02-21 21:22 ` Richard Henderson
2024-02-22 1:52 ` Jinjie Ruan via
2024-02-21 13:08 ` [RFC PATCH v2 02/22] target/arm: Handle HCR_EL2 accesses for bits introduced with FEAT_NMI Jinjie Ruan via
2024-02-21 18:28 ` Richard Henderson
2024-02-21 13:08 ` [RFC PATCH v2 03/22] target/arm: Add PSTATE.ALLINT Jinjie Ruan via
2024-02-21 18:50 ` Richard Henderson
2024-02-22 1:48 ` Jinjie Ruan via
2024-02-22 19:25 ` Richard Henderson
2024-02-21 13:08 ` [RFC PATCH v2 04/22] target/arm: Implement ALLINT MSR (immediate) Jinjie Ruan via
2024-02-21 19:09 ` Richard Henderson
2024-02-21 19:17 ` Richard Henderson
2024-02-21 20:41 ` Richard Henderson
2024-02-22 2:40 ` Jinjie Ruan via
2024-02-22 19:42 ` Richard Henderson
2024-02-22 2:34 ` Jinjie Ruan via
2024-02-21 13:08 ` [RFC PATCH v2 05/22] target/arm: Support MSR access to ALLINT Jinjie Ruan via
2024-02-21 19:28 ` Richard Henderson
2024-02-22 3:50 ` Jinjie Ruan via
2024-02-21 13:08 ` [RFC PATCH v2 06/22] target/arm: Add support for Non-maskable Interrupt Jinjie Ruan via
2024-02-21 20:06 ` Richard Henderson
2024-02-22 2:44 ` Jinjie Ruan via
2024-02-22 9:27 ` Jinjie Ruan via
2024-02-21 21:23 ` Richard Henderson
2024-02-22 9:26 ` Jinjie Ruan via
2024-02-21 13:08 ` [RFC PATCH v2 07/22] target/arm: Add support for NMI event state Jinjie Ruan via
2024-02-21 20:10 ` Richard Henderson
2024-02-21 21:25 ` Richard Henderson [this message]
2024-02-22 11:52 ` Jinjie Ruan via
2024-02-22 18:38 ` Richard Henderson
2024-02-21 13:08 ` [RFC PATCH v2 08/22] target/arm: Handle IS/FS in ISR_EL1 for NMI Jinjie Ruan via
2024-02-21 21:36 ` Richard Henderson
2024-02-22 12:34 ` Jinjie Ruan via
2024-02-21 13:08 ` [RFC PATCH v2 09/22] target/arm: Add support for FEAT_NMI, Non-maskable Interrupt Jinjie Ruan via
2024-02-21 20:16 ` Richard Henderson
2024-02-21 13:08 ` [RFC PATCH v2 10/22] target/arm: Handle PSTATE.ALLINT on taking an exception Jinjie Ruan via
2024-02-21 20:36 ` Richard Henderson
2024-02-21 13:08 ` [RFC PATCH v2 11/22] target/arm: Set pstate.ALLINT in arm_cpu_reset_hold Jinjie Ruan via
2024-02-21 20:43 ` Richard Henderson
2024-02-22 12:48 ` Jinjie Ruan via
2024-02-21 13:08 ` [RFC PATCH v2 12/22] hw/arm/virt: Wire NMI irq line from GIC to CPU Jinjie Ruan via
2024-02-21 13:08 ` [RFC PATCH v2 13/22] hw/intc/arm_gicv3: Add external IRQ lines for NMI Jinjie Ruan via
2024-02-21 13:08 ` [RFC PATCH v2 14/22] target/arm: Handle NMI in arm_cpu_do_interrupt_aarch64() Jinjie Ruan via
2024-02-21 13:08 ` [RFC PATCH v2 15/22] hw/intc/arm_gicv3_redist: Implement GICR_INMIR0 Jinjie Ruan via
2024-02-21 20:48 ` Richard Henderson
2024-02-21 13:08 ` [RFC PATCH v2 16/22] hw/intc/arm_gicv3: Implement GICD_INMIR Jinjie Ruan via
2024-02-21 21:44 ` Richard Henderson
2024-02-21 13:08 ` [RFC PATCH v2 17/22] hw/intc: Enable FEAT_GICv3_NMI Feature Jinjie Ruan via
2024-02-21 13:08 ` [RFC PATCH v2 18/22] hw/arm/virt: Add FEAT_GICv3_NMI feature support in virt GIC Jinjie Ruan via
2024-02-21 21:47 ` Richard Henderson
2024-02-21 13:08 ` [RFC PATCH v2 19/22] hw/intc/arm_gicv3: Add irq superpriority information Jinjie Ruan via
2024-02-21 21:48 ` Richard Henderson
2024-02-21 13:08 ` [RFC PATCH v2 20/22] hw/intc/arm_gicv3: Add NMI handling CPU interface registers Jinjie Ruan via
2024-02-21 13:08 ` [RFC PATCH v2 21/22] hw/intc/arm_gicv3: Implement NMI interrupt prioirty Jinjie Ruan via
2024-02-21 13:08 ` [RFC PATCH v2 22/22] hw/intc/arm_gicv3: Report the NMI interrupt in gicv3_cpuif_update() Jinjie Ruan via
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=a4c733be-450b-4d28-b869-fd80630f3ecb@linaro.org \
--to=richard.henderson@linaro.org \
--cc=eduardo@habkost.net \
--cc=marcel.apfelbaum@gmail.com \
--cc=peter.maydell@linaro.org \
--cc=philmd@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=ruanjinjie@huawei.com \
--cc=wangyanan55@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).