From: Richard Henderson <richard.henderson@linaro.org>
To: Alexey Baturo <baturo.alexey@gmail.com>
Cc: "open list:RISC-V TCG CPUs" <qemu-riscv@nongnu.org>,
Sagar Karandikar <sagark@eecs.berkeley.edu>,
Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
"open list:All patches CC here" <qemu-devel@nongnu.org>,
space.monkey.delivers@gmail.com,
Alistair Francis <Alistair.Francis@wdc.com>,
Palmer Dabbelt <palmer@dabbelt.com>
Subject: Re: [PATCH 5/5] [RISCV_PM] Support pointer masking for RISC-V for i/c/f/d/a types of instructions
Date: Wed, 14 Oct 2020 12:24:49 -0700 [thread overview]
Message-ID: <a4c7ff19-0b5b-263b-51da-80b5caea8f27@linaro.org> (raw)
In-Reply-To: <20201014170159.26932-6-space.monkey.delivers@gmail.com>
On 10/14/20 10:01 AM, Alexey Baturo wrote:
> + if (has_ext(ctx, RVJ)) {
> + src1 = apply_pointer_masking(ctx, src1);
> + }
The if is redundant, since that will have been done in cpu_get_tb_cpu_state
while assigning pm_enabled.
The test for pm_enabled is in gen_pm_adjust_address.
The final thing is that the API for apply_pointer_masking is misleading. Here,
it appears as if you are allocating a new temporary and assigning it to src1.
Which is not the case.
I suggest you drop apply_pointer_masking and just use gen_pm_adjust_address.
r~
next prev parent reply other threads:[~2020-10-14 19:30 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20201014170159.26932-1-space.monkey.delivers@gmail.com>
2020-10-14 17:01 ` [PATCH 1/5] [RISCV_PM] Add J-extension into RISC-V Alexey Baturo
2020-10-14 17:01 ` [PATCH 2/5] [RISCV_PM] Support CSRs required for RISC-V PM extension except for ones in hypervisor mode Alexey Baturo
2020-10-14 17:01 ` [PATCH 3/5] [RISCV_PM] Print new PM CSRs in QEMU logs Alexey Baturo
2020-10-14 18:41 ` Richard Henderson
2020-10-14 20:01 ` Alexey Baturo
2020-10-14 17:01 ` [PATCH 4/5] [RISCV_PM] Add address masking functions required for RISC-V Pointer Masking extension Alexey Baturo
2020-10-14 19:19 ` Richard Henderson
2020-10-14 20:10 ` Alexey Baturo
2020-10-15 15:23 ` Alexey Baturo
2020-10-14 17:01 ` [PATCH 5/5] [RISCV_PM] Support pointer masking for RISC-V for i/c/f/d/a types of instructions Alexey Baturo
2020-10-14 19:24 ` Richard Henderson [this message]
2020-10-14 20:13 ` Alexey Baturo
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