From: Richard Henderson <richard.henderson@linaro.org>
To: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>, qemu-devel@nongnu.org
Cc: arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net
Subject: Re: [Qemu-devel] [PATCH v2 5/6] target/mips: Add emulation of MMI instruction PEXCH
Date: Tue, 26 Feb 2019 09:06:38 -0800 [thread overview]
Message-ID: <a61d447c-1454-6c6b-7209-1fa8813bebc0@linaro.org> (raw)
In-Reply-To: <1551183797-13570-6-git-send-email-mateja.marjanovic@rt-rk.com>
On 2/26/19 4:23 AM, Mateja Marjanovic wrote:
> + } else if (rd == rt) {
> + TCGv_i64 t0 = tcg_temp_new();
> + TCGv_i64 t1 = tcg_temp_new();
> + uint64_t mask0 = (1ULL << 16) - 1;
> + uint64_t mask1 = mask0 << 16;
> + uint64_t mask2 = mask1 << 16;
> + uint64_t mask3 = (mask2 << 16) | mask0;
> +
> + tcg_gen_andi_i64(t0, cpu_gpr[rt], mask1);
> + tcg_gen_shli_i64(t0, t0, 16);
> + tcg_gen_andi_i64(t1, cpu_gpr[rt], mask2);
> + tcg_gen_shri_i64(t1, t1, 16);
> +
> + tcg_gen_andi_i64(cpu_gpr[rt], cpu_gpr[rt], mask3);
> + tcg_gen_or_i64(cpu_gpr[rd], cpu_gpr[rd], t0);
> + tcg_gen_or_i64(cpu_gpr[rd], cpu_gpr[rd], t1);
> +
> + tcg_gen_andi_i64(t0, cpu_mmr[rt], mask1);
> + tcg_gen_shli_i64(t0, t0, 16);
> + tcg_gen_andi_i64(t1, cpu_mmr[rt], mask2);
> + tcg_gen_shri_i64(t1, t1, 16);
> +
> + tcg_gen_andi_i64(cpu_mmr[rt], cpu_mmr[rt], mask3);
> + tcg_gen_or_i64(cpu_mmr[rd], cpu_mmr[rd], t0);
> + tcg_gen_or_i64(cpu_mmr[rd], cpu_mmr[rd], t1);
> +
> + tcg_temp_free(t0);
> + tcg_temp_free(t1);
> + } else {
> + TCGv_i64 t0 = tcg_temp_new();
> + TCGv_i64 t1 = tcg_temp_new();
> + uint64_t mask0 = (1ULL << 16) - 1;
> + uint64_t mask1 = mask0 << 16;
> + uint64_t mask2 = mask1 << 16;
> + uint64_t mask3 = mask2 << 16;
> +
> + tcg_gen_andi_i64(t0, cpu_gpr[rt], mask3);
> + tcg_gen_andi_i64(t1, cpu_gpr[rt], mask2);
> + tcg_gen_shri_i64(t1, t1, 16);
> + tcg_gen_or_i64(t0, t0, t1);
> + tcg_gen_andi_i64(t1, cpu_gpr[rt], mask1);
> + tcg_gen_shli_i64(t1, t1, 16);
> + tcg_gen_or_i64(t0, t0, t1);
> + tcg_gen_andi_i64(t1, cpu_gpr[rt], mask0);
> + tcg_gen_or_i64(t0, t0, t1);
> +
> + tcg_gen_mov_i64(cpu_gpr[rd], t0);
> +
> + tcg_gen_andi_i64(t0, cpu_mmr[rt], mask3);
> + tcg_gen_andi_i64(t1, cpu_mmr[rt], mask2);
> + tcg_gen_shri_i64(t1, t1, 16);
> + tcg_gen_or_i64(t0, t0, t1);
> + tcg_gen_andi_i64(t1, cpu_mmr[rt], mask1);
> + tcg_gen_shli_i64(t1, t1, 16);
> + tcg_gen_or_i64(t0, t0, t1);
> + tcg_gen_andi_i64(t1, cpu_mmr[rt], mask0);
> + tcg_gen_or_i64(t0, t0, t1);
> +
> + tcg_gen_mov_i64(cpu_mmr[rd], t0);
> +
> + tcg_temp_free(t0);
> + tcg_temp_free(t1);
> + }
The code for rd != rt will work just fine for rd == rt.
Why are you doubling the amount of code you are writing?
r~
next prev parent reply other threads:[~2019-02-26 17:07 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-26 12:23 [Qemu-devel] [PATCH v2 0/6] target/mips: Add emulation of data communication MMI instructions Mateja Marjanovic
2019-02-26 12:23 ` [Qemu-devel] [PATCH v2 1/6] target/mips: Preparing for adding " Mateja Marjanovic
2019-02-26 12:23 ` [Qemu-devel] [PATCH v2 2/6] target/mips: Add emulation of MMI instruction PCPYH Mateja Marjanovic
2019-02-26 17:14 ` Richard Henderson
2019-02-26 12:23 ` [Qemu-devel] [PATCH v2 3/6] target/mips: Add emulation of MMI instruction PCPYLD Mateja Marjanovic
2019-02-26 17:01 ` Richard Henderson
2019-02-26 12:23 ` [Qemu-devel] [PATCH v2 4/6] target/mips: Add emulation of MMI instruction PCPYUD Mateja Marjanovic
2019-02-26 12:23 ` [Qemu-devel] [PATCH v2 5/6] target/mips: Add emulation of MMI instruction PEXCH Mateja Marjanovic
2019-02-26 17:06 ` Richard Henderson [this message]
2019-02-26 12:23 ` [Qemu-devel] [PATCH v2 6/6] target/mips: Add emulation of MMI instruction PEXCW Mateja Marjanovic
2019-02-26 17:14 ` Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=a61d447c-1454-6c6b-7209-1fa8813bebc0@linaro.org \
--to=richard.henderson@linaro.org \
--cc=amarkovic@wavecomp.com \
--cc=arikalo@wavecomp.com \
--cc=aurelien@aurel32.net \
--cc=mateja.marjanovic@rt-rk.com \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).