From: Laurent Vivier <laurent@vivier.eu>
To: Richard Henderson <rth@twiddle.net>, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 1/5] target-m68k: implement 680x0 movem
Date: Sun, 6 Nov 2016 17:52:50 +0100 [thread overview]
Message-ID: <a6232183-5f75-85fb-b091-a4fc81cdf0d4@vivier.eu> (raw)
In-Reply-To: <1478413123-4575-2-git-send-email-rth@twiddle.net>
Le 06/11/2016 à 07:18, Richard Henderson a écrit :
...
> + if (is_load) {
> + /* memory to register */
> + for (i = 0; i < 16; i++) {
> + if (mask & (1 << i)) {
> + r[i] = gen_load(s, opsize, addr, 1);
> + tcg_gen_add_i32(addr, addr, incr);
> + }
> + }
> + for (i = 0; i < 16; i++) {
> + if (mask & (1 << i)) {
> + tcg_gen_mov_i32(mreg(i), r[i]);
> + tcg_temp_free(r[i]);
> + }
> + }
> + if (mode == 3) {
> + /* post-increment: movem (An)+,X */
> + tcg_gen_mov_i32(AREG(insn, 0), addr);
Why AREG() instead of cpu_aregs[]?
> + }
> + } else {
> + /* register to memory */
> + if (mode == 4) {
> + /* pre-decrement: movem X,-(An) */
> + for (i = 15; i >= 0; i--) {
> + if ((mask << i) & 0x8000) {
> + tcg_gen_sub_i32(addr, addr, incr);
> + if (reg0 + 8 == i &&
> + m68k_feature(s->env, M68K_FEATURE_EXT_FULL)) {
> + /* M68020+: if the addressing register is the
> + * register moved to memory, the value written
> + * is the initial value decremented by the size of
> + * the operation, regardless of how many actual
> + * stores have been performed until this point.
> + * M68000/M68010: the value is the initial value.
> + */
> + TCGv tmp = tcg_temp_new();
tmp is already declared at the top of the function, perhaps you can
remove the declaration part here?
Thanks,
Laurent
next prev parent reply other threads:[~2016-11-06 16:53 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-06 6:18 [Qemu-devel] [PATCH 0/5] target-m68k patches Richard Henderson
2016-11-06 6:18 ` [Qemu-devel] [PATCH 1/5] target-m68k: implement 680x0 movem Richard Henderson
2016-11-06 16:52 ` Laurent Vivier [this message]
2016-11-06 6:18 ` [Qemu-devel] [PATCH 2/5] target-m68k: Do not cpu_abort on undefined insns Richard Henderson
2016-11-06 16:53 ` Laurent Vivier
2016-11-06 6:18 ` [Qemu-devel] [PATCH 3/5] target-m68k: Inline shifts Richard Henderson
2016-11-06 6:18 ` [Qemu-devel] [PATCH 4/5] target-m68k: Implement bitfield ops for registers Richard Henderson
2016-11-06 6:18 ` [Qemu-devel] [PATCH 5/5] target-m68k: Implement bitfield ops for memory Richard Henderson
2016-11-06 19:52 ` [Qemu-devel] [PATCH 0/5] target-m68k patches Laurent Vivier
2016-11-07 12:08 ` Richard Henderson
2016-11-07 12:24 ` Laurent Vivier
2016-11-07 13:12 ` Peter Maydell
2016-11-07 13:44 ` Laurent Vivier
2016-11-07 13:50 ` Peter Maydell
2016-11-07 14:00 ` Laurent Vivier
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