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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: c@jia.je, Huacai Chen <chenhuacai@kernel.org>
Cc: qemu-devel@nongnu.org, richard.henderson@linaro.org,
	Song Gao <gaosong@loongson.cn>,
	maobibo@loongson.cn, yangxiaojuan@loongson.cn, yijun@loongson.cn,
	shenjinyang@loongson.cn
Subject: Re: [PATCH v3 13/18] target/loongarch: Add loongarch32 cpu la132
Date: Fri, 18 Aug 2023 11:29:49 +0200	[thread overview]
Message-ID: <a650e078-bfdd-cb94-dbd3-923d7c16f7c8@linaro.org> (raw)
In-Reply-To: <20230817093121.1053890-14-gaosong@loongson.cn>

On 17/8/23 11:31, Song Gao wrote:
> From: Jiajie Chen <c@jia.je>
> 
> Add la132 as a loongarch32 cpu type and allow virt machine to be used
> with la132 instead of la464.
> 
> Due to lack of public documentation of la132, it is currently a
> synthetic loongarch32 cpu model. Details need to be added in the future.
> 
> Signed-off-by: Jiajie Chen <c@jia.je>
> Acked-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Song Gao <gaosong@loongson.cn>
> ---
>   hw/loongarch/virt.c    |  5 -----
>   target/loongarch/cpu.c | 29 +++++++++++++++++++++++++++++
>   2 files changed, 29 insertions(+), 5 deletions(-)
> 
> diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
> index 8d95c997dc..95e00a044c 100644
> --- a/target/loongarch/cpu.c
> +++ b/target/loongarch/cpu.c


> +static void loongarch_la132_initfn(Object *obj)
> +{
> +    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
> +    CPULoongArchState *env = &cpu->env;
> +
> +    int i;
> +
> +    for (i = 0; i < 21; i++) {
> +        env->cpucfg[i] = 0x0;
> +    }
> +
> +    cpu->dtb_compatible = "loongarch,Loongson-1C103";
> +
> +    uint32_t data = 0;
> +    data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */
> +    data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
> +    data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
> +    data = FIELD_DP32(data, CPUCFG1, PALEN, 0x1f); /* 32 bits */
> +    data = FIELD_DP32(data, CPUCFG1, VALEN, 0x1f); /* 32 bits */
> +    data = FIELD_DP32(data, CPUCFG1, UAL, 1);
> +    data = FIELD_DP32(data, CPUCFG1, RI, 0);
> +    data = FIELD_DP32(data, CPUCFG1, EP, 0);
> +    data = FIELD_DP32(data, CPUCFG1, RPLV, 0);
> +    data = FIELD_DP32(data, CPUCFG1, HP, 1);
> +    data = FIELD_DP32(data, CPUCFG1, IOCSR_BRD, 1);
> +    env->cpucfg[1] = data;

So we have PRid = env->cpucfg[0] = 0...

The LA132 series is 0x8000, so we can use smth like:

        env->cpucfg[0] = 0x148042;  /* PRID */

> +}
> +
>   static void loongarch_cpu_list_entry(gpointer data, gpointer user_data)
>   {
>       const char *typename = object_class_get_name(OBJECT_CLASS(data));
> @@ -779,6 +807,7 @@ static const TypeInfo loongarch_cpu_type_infos[] = {
>           .class_init = loongarch32_cpu_class_init,
>       },
>       DEFINE_LOONGARCH_CPU_TYPE("la464", loongarch_la464_initfn),
> +    DEFINE_LOONGARCH32_CPU_TYPE("la132", loongarch_la132_initfn),
>   };

CPUNAME_REG in loongarch_qemu_read() is likely incorrect, but not a
big deal.


  reply	other threads:[~2023-08-18  9:30 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-17  9:31 [PATCH v3 00/18] Add some checks before translating instructions Song Gao
2023-08-17  9:31 ` [PATCH v3 01/18] target/loongarch: Add function to check current arch Song Gao
2023-08-18 16:58   ` Philippe Mathieu-Daudé
2023-08-17  9:31 ` [PATCH v3 02/18] target/loongarch: Add new object class for loongarch32 cpus Song Gao
2023-08-18  8:51   ` Philippe Mathieu-Daudé
2023-08-18  8:56     ` chen huacai
2023-08-17  9:31 ` [PATCH v3 03/18] target/loongarch: Add GDB support for loongarch32 mode Song Gao
2023-08-17  9:31 ` [PATCH v3 04/18] target/loongarch: Support LoongArch32 TLB entry Song Gao
2023-08-17  9:31 ` [PATCH v3 05/18] target/loongarch: Support LoongArch32 DMW Song Gao
2023-08-17  9:31 ` [PATCH v3 06/18] target/loongarch: Support LoongArch32 VPPN Song Gao
2023-08-17  9:31 ` [PATCH v3 07/18] target/loongarch: Add LA64 & VA32 to DisasContext Song Gao
2023-08-17  9:31 ` [PATCH v3 08/18] target/loongarch: Truncate high 32 bits of address in VA32 mode Song Gao
2023-08-18  9:41   ` Philippe Mathieu-Daudé
2023-08-18 15:25     ` Richard Henderson
2023-08-18 17:05       ` Philippe Mathieu-Daudé
2023-08-17  9:31 ` [PATCH v3 09/18] target/loongarch: Sign extend results " Song Gao
2023-08-17  9:31 ` [PATCH v3 10/18] target/loongarch: Fix loongarch_la464_initfn() misses setting LSPW Song Gao
2023-08-18 10:36   ` Philippe Mathieu-Daudé
2023-08-17  9:31 ` [PATCH v3 11/18] target/loongarch: Add a check parameter to the TRANS macro Song Gao
2023-08-18 10:39   ` Philippe Mathieu-Daudé
2023-08-18 15:28   ` Richard Henderson
2023-08-17  9:31 ` [PATCH v3 12/18] target/loongarch: Add avail_64 to check la64-only instructions Song Gao
2023-08-18 15:32   ` Richard Henderson
2023-08-17  9:31 ` [PATCH v3 13/18] target/loongarch: Add loongarch32 cpu la132 Song Gao
2023-08-18  9:29   ` Philippe Mathieu-Daudé [this message]
2023-08-18 10:41   ` Philippe Mathieu-Daudé
2023-08-17  9:31 ` [PATCH v3 14/18] target/loongarch: Add avail_FP/FP_SP/FP_DP to check fpu instructions Song Gao
2023-08-17  9:31 ` [PATCH v3 15/18] target/loongarch: Add avail_LSPW to check LSPW instructions Song Gao
2023-08-17  9:31 ` [PATCH v3 16/18] target/loongarch: Add avail_LAM to check atomic instructions Song Gao
2023-08-18 15:34   ` Richard Henderson
2023-08-17  9:31 ` [PATCH v3 17/18] target/loongarch: Add avail_LSX to check LSX instructions Song Gao
2023-08-17  9:31 ` [PATCH v3 18/18] target/loongarch: Add avail_IOCSR to check iocsr instructions Song Gao

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