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Tue, 21 Oct 2025 09:16:37 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGEqUF2Nl1eabLNJoukdEvoP9IAE9TrACLu+/Cjiv5t5AUKxzkiuEZId+H1bpbkJZ2FzpyLKA== X-Received: by 2002:a05:600c:468b:b0:45b:92a6:63e3 with SMTP id 5b1f17b1804b1-475c3eaf656mr2128225e9.9.1761063396972; Tue, 21 Oct 2025 09:16:36 -0700 (PDT) Received: from [192.168.43.95] ([78.245.103.33]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-475c427ed3fsm246295e9.1.2025.10.21.09.16.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 21 Oct 2025 09:16:36 -0700 (PDT) Message-ID: Date: Tue, 21 Oct 2025 18:16:34 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 12/27] hw/arm/smmuv3-accel: Make use of get_msi_address_space() callback Content-Language: en-US To: Shameer Kolothum , "qemu-arm@nongnu.org" , "qemu-devel@nongnu.org" Cc: "peter.maydell@linaro.org" , Jason Gunthorpe , Nicolin Chen , "ddutile@redhat.com" , "berrange@redhat.com" , Nathan Chen , Matt Ochs , "smostafa@google.com" , "wangzhou1@hisilicon.com" , "jiangkunkun@huawei.com" , "jonathan.cameron@huawei.com" , "zhangfei.gao@linaro.org" , "zhenzhong.duan@intel.com" , "yi.l.liu@intel.com" , "shameerkolothum@gmail.com" References: <20250929133643.38961-1-skolothumtho@nvidia.com> <20250929133643.38961-13-skolothumtho@nvidia.com> <8ce5574e-3e31-456c-9579-0fbf8526651f@redhat.com> From: Eric Auger In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Shameer, On 10/21/25 10:15 AM, Shameer Kolothum wrote: > Hi Eric, > >> -----Original Message----- >> From: Eric Auger >> Sent: 20 October 2025 17:44 >> To: Shameer Kolothum ; qemu- >> arm@nongnu.org; qemu-devel@nongnu.org >> Cc: peter.maydell@linaro.org; Jason Gunthorpe ; Nicolin >> Chen ; ddutile@redhat.com; berrange@redhat.com; >> Nathan Chen ; Matt Ochs ; >> smostafa@google.com; wangzhou1@hisilicon.com; >> jiangkunkun@huawei.com; jonathan.cameron@huawei.com; >> zhangfei.gao@linaro.org; zhenzhong.duan@intel.com; yi.l.liu@intel.com; >> shameerkolothum@gmail.com >> Subject: Re: [PATCH v4 12/27] hw/arm/smmuv3-accel: Make use of >> get_msi_address_space() callback >> >> External email: Use caution opening links or attachments >> >> >> Hi Shameer, >> >> On 9/29/25 3:36 PM, Shameer Kolothum wrote: >>> Here we return the IOMMU address space if the device has S1 translation >>> enabled by Guest. Otherwise return system address space. >>> >>> Signed-off-by: Shameer Kolothum >> >>> Signed-off-by: Shameer Kolothum >>> --- >>> hw/arm/smmuv3-accel.c | 21 +++++++++++++++++++++ >>> 1 file changed, 21 insertions(+) >>> >>> diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c >>> index 790887ac31..f4e01fba6d 100644 >>> --- a/hw/arm/smmuv3-accel.c >>> +++ b/hw/arm/smmuv3-accel.c >>> @@ -387,6 +387,26 @@ static void >> smmuv3_accel_unset_iommu_device(PCIBus *bus, void *opaque, >>> } >>> } >>> >>> +static AddressSpace *smmuv3_accel_find_msi_as(PCIBus *bus, void >> *opaque, >>> + int devfn) >>> +{ >>> + SMMUState *bs = opaque; >>> + SMMUPciBus *sbus = smmu_get_sbus(bs, bus); >>> + SMMUv3AccelDevice *accel_dev = smmuv3_accel_get_dev(bs, sbus, >> bus, devfn); >>> + SMMUDevice *sdev = &accel_dev->sdev; >>> + >>> + /* >>> + * If the assigned vfio-pci dev has S1 translation enabled by >>> + * Guest, return IOMMU address space for MSI translation. >>> + * Otherwise, return system address space. >>> + */ >>> + if (accel_dev->s1_hwpt) { >>> + return &sdev->as; >>> + } else { >>> + return &address_space_memory; >>> + } >> At the moment I don't understand this code either. In case of emulated >> device it then returns address_space_memory whereas I would have >> expected the opposite. I definitively need to trace things ;-) Thank you for the traces! > We have, > [VIRT_GIC_ITS] = { 0x08080000, 0x00020000 }, > > I added a few prints in kvm_arch_fixup_msi_route() so that it may help > to understand how the translation of MSI doorbell is performed here. > > If we return IOMMU addr space(&sdev->as) here, > > kvm_arch_fixup_msi_route: MSI IOVA=0xffbf0040 msi_addr_lo=0xffbf0040 msi_addr_hi=0x0 so this gIOVA > kvm_arch_fixup_msi_route: Translated doorbell_gpa= 0x8090040 > kvm_arch_fixup_msi_route: ret:MSI IOVA=0xffbf0040 translated: msi_addr_lo=0x8090040 msi_addr_hi=0x0 > > It gets the correct vITS gpA address after the translation through address_space_translate(). I agree it needs to be translated into the vITS doorbell reg. > > Since host uses the (MSI_IOVA_BASE, MSI_IOVA_LENGTH) for ITS doorbell mapping > and using IORT RMR we make sure there is an identity mapping for that range, it all > works fine. > > Now, suppose if we return system addr space(&address_space_memory): > > kvm_arch_fixup_msi_route: MSI IOVA=0xffbf0040 msi_addr_lo 0xffbf0040 msi_addr_hi 0x0 > kvm_arch_fixup_msi_route: address_space_memory, nothing to do, return > > And the device doorbell gets configured with gIOVA 0xffbf0040 instead of the vITS gPA > as Nicolin explained in the other thread. I agree that for MSI support you must remy on the IOMMU MR translate function, even for VFIO devices. Thanks Eric > > Hope this helps. > > Thanks, > Shameer >