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From: Richard Henderson <richard.henderson@linaro.org>
To: Dani Szebenyi <szedani@linux.ibm.com>,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Cc: Ilya Leoshkevich <iii@linux.ibm.com>
Subject: Re: [PATCH] tcg/ppc/tcg-target.c.inc: Fix tcg_out_rlw_rc
Date: Tue, 22 Oct 2024 11:19:50 -0700	[thread overview]
Message-ID: <a7630078-cdba-43d0-aa47-45faebba6b99@linaro.org> (raw)
In-Reply-To: <20241022133535.69351-2-szedani@linux.ibm.com>

On 10/22/24 06:34, Dani Szebenyi wrote:
> The previous message I sent was corrupted, sending again.
> 
> The TCG IR sequence:
> mov_i32 tmp97,$0xc4240000                dead: 1  pref=0xffffffff
> mov_i32 tmp98,$0x0                       pref=0xffffffff
> rotr_i32 tmp97,tmp97,tmp98               dead: 1 2  pref=0xffffffff
> 
> was translated to `slwi	r15, r14, 0` instead of `slwi	r14, r14, 0` due to SH field overflow.
> 
> SH field is 5 bits, and tcg_out_rlw is called in some situations with `32-n`, when `n` is 0 it results in an overflow to RA field.
> 
> This commit prevents overflow of that field and adds debug assertions for the other fields
> 
> Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
> Signed-off-by: Dani Szebenyi <szedani@linux.ibm.com>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

and queued.


r~


  reply	other threads:[~2024-10-22 18:20 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-22 13:34 [PATCH] tcg/ppc/tcg-target.c.inc: Fix tcg_out_rlw_rc Dani Szebenyi
2024-10-22 18:19 ` Richard Henderson [this message]
  -- strict thread matches above, loose matches on Subject: below --
2024-10-22 12:14 Dani Szebenyi

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