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[189.46.169.45]) by smtp.gmail.com with ESMTPSA id z8-20020a05683020c800b0060b0bf08ef8sm2091173otq.7.2022.05.23.12.24.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 23 May 2022 12:24:25 -0700 (PDT) Message-ID: Date: Mon, 23 May 2022 16:24:22 -0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.0 Subject: Re: [PATCH 0/4] ppc: improve some memory ordering issues Content-Language: en-US To: Nicholas Piggin , qemu-ppc@nongnu.org Cc: qemu-devel@nongnu.org, Richard Henderson References: <20220519135908.21282-1-npiggin@gmail.com> From: Daniel Henrique Barboza In-Reply-To: <20220519135908.21282-1-npiggin@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2001:4860:4864:20::2d; envelope-from=danielhb413@gmail.com; helo=mail-oa1-x2d.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks, Daniel On 5/19/22 10:59, Nicholas Piggin wrote: > Since RFC[*], this fixes a compile issue noticed by Richard, > and has survived some basic stressing with mttcg. > > Thanks, > Nick > > [*] https://lists.nongnu.org/archive/html/qemu-ppc/2022-05/msg00046.html > > Nicholas Piggin (4): > target/ppc: Fix eieio memory ordering semantics > tcg/ppc: ST_ST memory ordering is not provided with eieio > tcg/ppc: Optimize memory ordering generation with lwsync > target/ppc: Implement lwsync with weaker memory ordering > > target/ppc/cpu.h | 4 +++- > target/ppc/cpu_init.c | 13 +++++++------ > target/ppc/machine.c | 3 ++- > target/ppc/translate.c | 35 +++++++++++++++++++++++++++++++++-- > tcg/ppc/tcg-target.c.inc | 11 ++++++----- > 5 files changed, 51 insertions(+), 15 deletions(-) >