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Sun, 20 Oct 2024 11:41:50 -0700 (PDT) Message-ID: Date: Sun, 20 Oct 2024 15:41:47 -0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/8] Add support for emulation of CRC32 instructions To: Aleksandar Rakic , "qemu-devel@nongnu.org" Cc: Djordje Todorovic , "cfu@mips.com" , "arikalo@gmail.com" , "peter.maydell@linaro.org" References: Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=philmd@linaro.org; helo=mail-pj1-x1030.google.com X-Spam_score_int: 12 X-Spam_score: 1.2 X-Spam_bar: + X-Spam_report: (1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SBL_CSS=3.335, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Aleksandar, On 18/10/24 10:19, Aleksandar Rakic wrote: > Add emulation of MIPS' CRC32 (Cyclic Redundancy Check) instructions. > Reuse zlib crc32() and Linux crc32c(). > > Cherry-picked 4cc974938aee1588f852590509004e340c072940 > from https://github.com/MIPS/gnutools-qemu > > Signed-off-by: Yongbok Kim > Signed-off-by: Aleksandar Markovic > Signed-off-by: Aleksandar Rakic > --- > target/mips/helper.h | 2 ++ > target/mips/meson.build | 1 + > target/mips/tcg/op_helper.c | 26 ++++++++++++++++++++++++++ > target/mips/tcg/translate.c | 37 +++++++++++++++++++++++++++++++++++++ > target/mips/tcg/translate.h | 1 + > 5 files changed, 67 insertions(+) > diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c > index 333469b268..256fa0893e 100644 > --- a/target/mips/tcg/translate.c > +++ b/target/mips/tcg/translate.c > @@ -430,6 +430,7 @@ enum { > OPC_LWE = 0x2F | OPC_SPECIAL3, > > /* R6 */ > + OPC_CRC32 = 0x0F | OPC_SPECIAL3, > R6_OPC_PREF = 0x35 | OPC_SPECIAL3, > R6_OPC_CACHE = 0x25 | OPC_SPECIAL3, > R6_OPC_LL = 0x36 | OPC_SPECIAL3, > @@ -13705,6 +13730,17 @@ static void decode_opc_special3_r6(CPUMIPSState *env, DisasContext *ctx) > > op1 = MASK_SPECIAL3(ctx->opcode); > switch (op1) { > + case OPC_CRC32: > + if (unlikely(!ctx->crcp) || > + unlikely((extract32(ctx->opcode, 6, 2) == 3) && > + (!(ctx->hflags & MIPS_HFLAG_64))) || > + unlikely((extract32(ctx->opcode, 8, 3) >= 2))) { > + gen_reserved_instruction(ctx); > + } > + gen_crc32(ctx, rt, rs, rt, > + extract32(ctx->opcode, 6, 2), > + extract32(ctx->opcode, 8, 3)); > + break; New opcode must be implemented in decodetree format, please add these in target/mips/tcg/rel6* files (the change should be trivial and should only involve modifying few lines -- see for example commit 675bf34a6fe and around). Thanks, Phil.