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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Paolo Bonzini <pbonzini@redhat.com>,
	qemu-devel@nongnu.org, Markus Armbruster <armbru@redhat.com>
Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
	Zhao Liu <zhao1.liu@linux.intel.com>,
	qemu-block@nongnu.org, John Snow <jsnow@redhat.com>,
	qemu-ppc@nongnu.org, Eduardo Habkost <eduardo@habkost.net>,
	Richard Henderson <richard.henderson@linaro.org>,
	Kevin Wolf <kwolf@redhat.com>
Subject: Re: [PATCH v3 00/11] hw: Strengthen SysBus & QBus API
Date: Fri, 11 Oct 2024 19:11:18 -0300	[thread overview]
Message-ID: <a7aa5078-0787-4fa5-95d4-62dbd9a89ac9@linaro.org> (raw)
In-Reply-To: <2758986e-72f4-4706-a3d3-c63c6283af86@redhat.com>

On 11/10/24 05:56, Paolo Bonzini wrote:
> On 2/8/24 19:12, Philippe Mathieu-Daudé wrote:
>> Hi,
>>
>> This series ensure following is called *before* a
>> device is realized:
>> - qbus_new()
>> - sysbus_init_mmio()
>> - qdev_init_gpio_in_named_with_opaque()
>>
>> and these are called *after* it is:
>> - sysbus_mmio_map()
>> - sysbus_connect_irq(),
>> - qdev_connect_gpio_out()
>> - qdev_connect_gpio_out_named()
> 
> This series is missing a _why_.  The original vision for qdev was that 
> the whole machine would be realized at once from vl.c, and therefore 
> there would be no need for realizing subcomponents by hand.
> 
> This probably will never happen, but it is still worth explaining why 
> it's now considered so conceptually wrong, that it is (or will be) 
> enforced by the API.

When looking at a roadmap toward "dynamic machines" with Markus we
needed to clarify the QOM life cycle before thinking about possible
DSL to declare machines and components. See:

= Problem 4: The /machine/unattached/ orphanage =
= Problem 5: QOM lacks a clear life cycle =
= Problem 7: Design of the machine specification DSL =
in https://lore.kernel.org/qemu-devel/87o7d1i7ky.fsf@pond.sub.org/,
in particular:

     '''
     We need to manage a state transition from "object created,
     but not ready for use" to "object configured and ready for
     use".  In what order do the objects change state?
     '''

and:

     '''
     Ideally, a composite object's components go through the life
     cycle together.  First, create all the components and assign
     parents.  This also creates all the properties.  Then configure
     the object by setting property values.  Finally, complete / realize
     all components.
     '''

We need a better QOM documentation, "Device Life-cycle" in
docs/devel/qom.rst doesn't reallyr describe the life cycle, and
doesn't mention the "realization" API contract.
Since you have more experience and historical view on the APIs,
I wouldn't mind if you want to clarify that; otherwise I'll try
to do it.

Regards,

Phil.


> Paolo



      reply	other threads:[~2024-10-11 22:12 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-08 18:12 [PATCH v3 00/11] hw: Strengthen SysBus & QBus API Philippe Mathieu-Daudé
2024-02-08 18:12 ` [PATCH v3 01/11] hw/ide/ich9: Use AHCIPCIState typedef Philippe Mathieu-Daudé
2024-02-09 11:28   ` Peter Maydell
2024-02-08 18:12 ` [PATCH v3 02/11] hw/rx/rx62n: Reduce inclusion of 'qemu/units.h' Philippe Mathieu-Daudé
2024-02-09 11:28   ` Peter Maydell
2024-02-12 11:24   ` Yoshinori Sato
2024-02-08 18:12 ` [PATCH v3 03/11] hw/rx/rx62n: Only call qdev_get_gpio_in() when necessary Philippe Mathieu-Daudé
2024-02-09 11:29   ` Peter Maydell
2024-02-12 11:25   ` Yoshinori Sato
2024-02-08 18:12 ` [PATCH v3 04/11] hw/i386/pc_q35: Realize LPC PCI function before accessing it Philippe Mathieu-Daudé
2024-02-08 18:29   ` BALATON Zoltan
2024-02-08 18:12 ` [PATCH v3 05/11] hw/ppc/prep: Realize ISA bridge " Philippe Mathieu-Daudé
2024-02-09 11:29   ` Peter Maydell
2024-02-09 21:29   ` Mark Cave-Ayland
2024-02-08 18:12 ` [PATCH v3 06/11] hw/misc/macio: Realize IDE controller " Philippe Mathieu-Daudé
2024-02-08 18:33   ` BALATON Zoltan
2024-02-09  6:40     ` Philippe Mathieu-Daudé
2024-02-09 21:32   ` Mark Cave-Ayland
2024-02-08 18:12 ` [PATCH v3 07/11] hw/sh4/r2d: " Philippe Mathieu-Daudé
2024-02-09 11:30   ` Peter Maydell
2024-02-12 12:48   ` Yoshinori Sato
2024-05-03 21:34   ` Guenter Roeck
2024-10-11  8:23     ` Thomas Huth
2024-10-11 22:48       ` Philippe Mathieu-Daudé
2024-10-12  9:40         ` Thomas Huth
2024-10-12 14:06           ` Bernhard Beschow
2024-10-13  4:53             ` Guenter Roeck
2024-10-13  5:18               ` Thomas Huth
2024-02-08 18:12 ` [PATCH v3 08/11] hw/sparc/sun4m: Realize DMA " Philippe Mathieu-Daudé
2024-02-09 11:37   ` Peter Maydell
2024-02-09 22:37     ` Mark Cave-Ayland
2024-02-09 21:38   ` Mark Cave-Ayland
2024-02-08 18:12 ` [PATCH v3 09/11] hw/sparc/leon3: Realize GRLIB IRQ " Philippe Mathieu-Daudé
2024-02-09 11:38   ` Peter Maydell
2024-02-09 21:39   ` Mark Cave-Ayland
2024-02-08 18:12 ` [PATCH v3 10/11] hw/sparc/leon3: Initialize GPIO before realizing CPU devices Philippe Mathieu-Daudé
2024-02-09 11:35   ` Peter Maydell
2024-02-09 21:48   ` Mark Cave-Ayland
2024-02-08 18:12 ` [PATCH v3 11/11] hw/sparc64/cpu: " Philippe Mathieu-Daudé
2024-02-09 11:34   ` Peter Maydell
2024-02-09 22:01     ` Mark Cave-Ayland
2024-02-13 13:00       ` Philippe Mathieu-Daudé
2024-02-09 21:49   ` Mark Cave-Ayland
2024-10-11  8:56 ` [PATCH v3 00/11] hw: Strengthen SysBus & QBus API Paolo Bonzini
2024-10-11 22:11   ` Philippe Mathieu-Daudé [this message]

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