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([2001:b07:6468:f312:9af8:e5f5:7516:fa89]) by smtp.googlemail.com with ESMTPSA id i23-20020a056402055700b0043a2338ca10sm8720846edx.92.2022.07.18.09.08.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 18 Jul 2022 09:08:44 -0700 (PDT) Message-ID: Date: Mon, 18 Jul 2022 18:08:41 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH] i386: Disable BTS and PEBS Content-Language: en-US To: Zhenzhong Duan , qemu-devel@nongnu.org Cc: mtosatti@redhat.com, seanjc@google.com, likexu@tencent.com, xiangfeix.ma@intel.com References: <20220718032206.34488-1-zhenzhong.duan@intel.com> From: Paolo Bonzini In-Reply-To: <20220718032206.34488-1-zhenzhong.duan@intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::531; envelope-from=paolo.bonzini@gmail.com; helo=mail-ed1-x531.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 7/18/22 05:22, Zhenzhong Duan wrote: > Since below KVM commit, KVM hided BTS as it's not supported yet. > b9181c8ef356 ("KVM: x86/pmu: Avoid exposing Intel BTS feature") > > After below KVM commit, it gave control of MSR_IA32_MISC_ENABLES to userspace. > 9fc222967a39 ("KVM: x86: Give host userspace full control of MSR_IA32_MISC_ENABLES") > > So qemu takes the responsibility to hide BTS. > Without fix, we get below warning in guest kernel: > > [] unchecked MSR access error: WRMSR to 0x1d9 (tried to write 0x00000000000001c0) at rIP: 0xffffffffaa070644 (native_write_msr+0x4/0x20) > [] Call Trace: > [] > [] intel_pmu_enable_bts+0x5d/0x70 > [] bts_event_add+0x77/0x90 > [] event_sched_in.isra.135+0x99/0x1e0 > > Tested-by: Xiangfei Ma > Signed-off-by: Zhenzhong Duan > --- > target/i386/cpu.h | 6 ++++-- > target/i386/kvm/kvm.c | 4 ++++ > 2 files changed, 8 insertions(+), 2 deletions(-) > > diff --git a/target/i386/cpu.h b/target/i386/cpu.h > index 82004b65b944..8a83d0995c66 100644 > --- a/target/i386/cpu.h > +++ b/target/i386/cpu.h > @@ -434,8 +434,10 @@ typedef enum X86Seg { > > #define MSR_IA32_MISC_ENABLE 0x1a0 > /* Indicates good rep/movs microcode on some processors: */ > -#define MSR_IA32_MISC_ENABLE_DEFAULT 1 > -#define MSR_IA32_MISC_ENABLE_MWAIT (1ULL << 18) > +#define MSR_IA32_MISC_ENABLE_DEFAULT 1 > +#define MSR_IA32_MISC_ENABLE_BTS_UNAVAIL (1ULL << 11) > +#define MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL (1ULL << 12) > +#define MSR_IA32_MISC_ENABLE_MWAIT (1ULL << 18) > > #define MSR_MTRRphysBase(reg) (0x200 + 2 * (reg)) > #define MSR_MTRRphysMask(reg) (0x200 + 2 * (reg) + 1) > diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c > index f148a6d52fa4..002e0520dd76 100644 > --- a/target/i386/kvm/kvm.c > +++ b/target/i386/kvm/kvm.c > @@ -2180,6 +2180,10 @@ void kvm_arch_reset_vcpu(X86CPU *cpu) > { > CPUX86State *env = &cpu->env; > > + /* Disable BTS feature which is unsupported on KVM */ > + env->msr_ia32_misc_enable |= MSR_IA32_MISC_ENABLE_BTS_UNAVAIL; > + env->msr_ia32_misc_enable |= MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL; > + > env->xcr0 = 1; > if (kvm_irqchip_in_kernel()) { > env->mp_state = cpu_is_bsp(cpu) ? KVM_MP_STATE_RUNNABLE : This needs to be fixed in the kernel because old QEMU/new KVM is supported. But apart from that, where does Linux check MSR_IA32_MISC_ENABLE_BTS_UNAVAIL and MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL? Paolo